Revision as of 04:49, 27 May 2017

Fairchild 100K (F-100K) was a family of very high-speed discrete logic chips introduced by Fairchild Semiconductor in the mid-1970s. The 100K series was implemented using emitter-coupled logic (ECL) making those chips considerably faster than comparable Schottky TTL-based chips. The 100K family were an improved version of the 10K which was originally introduced by Motorola but was also manufactured by Fairchild. Many early high-speed systems and supercomputers made use of those chips.

Overview

In the mid-1970s Fairchild introduced the 100K which was an improved version of the original 10K family. 100K-based parts found their way into many early high-performance systems. For example, the Floating Point Systems FPS-264 64-bit floating-point co-processor which was introduced in February 1985 performed 4 to 5 times faster than its predecessor, FPS-164, by simply switching from to 100K ECL from Schottky TTL; this was all done without making any architectural changes and maintaining 100% software compatibility.

Making use of ECL meant system designers were confronted with high power consumption which reduced the usefulness of those chips. It's part of the reason why most systems that used those chips only used them where high speed was vitality needed and even then expensive special cooling was often needed.

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Systems

• 1981: Control Data Corporation Cyber 205 used 100K series chips for its microcode memory logic boards
• 1983: UC Berkeley Big RISC (BRISC) supercomputer was made entirely of 100K parts
• 1985: Floating Point Systems FPS-264 FP Coprocessor

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