Semiconductor & Computer Engineering
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Difference between revisions of "baikal/baikal-t1"
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Revision as of 12:35, 21 March 2017
Template:mpu The Baikal-T1 is a 32-bit dual-core MIPS32 microprocessor introduced by Baikal Electronics in 2015. The chip entered mass production in early 2016. The Baikal-T1 incorporates two of Imagination Technologies high-performance P5600 cores and is manufactured on TSMC's 28 nm process.
The chip consumes less than 5W and can be used in fanless designs.
Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
Networking
The Baikal-T1 has support for 1x10Gb and 2x1Gb Ethernet ports.
| Networking | |
| 1000Base-T | Yes |
| 10GBase-T | Yes |
Block Diagram
Facts about "Baikal-T1 - Baikal Electronics"
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ description | 4-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 4-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |