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Difference between revisions of "cavium/octeon/cn3005-300bg350-scp"
| Line 45: | Line 45: | ||
| die width = | | die width = | ||
| die length = | | die length = | ||
| − | | word size = | + | | word size = 64 bit |
| − | | core count = | + | | core count = 1 |
| − | | thread count = | + | | thread count = 1 |
| − | | max cpus = | + | | max cpus = 1 |
| max memory = 2 GiB | | max memory = 2 GiB | ||
| max memory addr = | | max memory addr = | ||
Revision as of 05:26, 8 December 2016
Template:mpu The CN3005-300 SCP is a 64-bit single-core MIPS secure communication microprocessor (SCP) designed by Cavium and introduced in early 2006. This processor, which incorporates a single cnMIPS core, operates at 300 MHz and dissipates 2 Watts. This processors includes a number of hardware security communication accelerators including units for encryption, QoS, and TCP acceleration.