From WikiChip
Difference between revisions of "amd/am286/n80c286-10"
< amd‎ | am286

(→‎Cache)
m (Bot: corrected mem)
Line 43: Line 43:
 
| thread count        =  
 
| thread count        =  
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          = 16 MB
+
| max memory          = 16 MiB
 
| max memory addr    = 0xFFFFFF
 
| max memory addr    = 0xFFFFFF
  

Revision as of 15:41, 23 June 2017

Template:mpu N80C286-10 was a member of AMD's Am286 family specifically designed for embedded applications, likely battery-powered. These chips were remade by AMD in static CMOS design (as opposed to nMOS), resulting in considerably lower power dissipation. This MPU was rated to operate at 10 MHz and was packaged in a 68-pin Plastic Leadless Chip Carrier package.

Cache

Main article: 80286 § Cache
Cache Info [Edit Values]
L1$ 0 KiB
0 B
0 MiB
1x0 KiB
L2$ 0 KiB
0 MiB
0 B
0 GiB
1x0 KiB

Graphics

This chip had no integrated graphics processing unit.

Features

  • Protected mode
  • Supports FPU coprocessor (Am287)
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/am286/n80c286-10&oldid=47019"
Facts about "N80C286-10 - AMD"
RDF feed
l1$ size0 KiB (0 B, 0 MiB) +
l2$ size0 MiB (0 KiB, 0 B, 0 GiB) +