From WikiChip
Difference between revisions of "amd/am8086/md8086"
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{{amd title|MD8086}} | {{amd title|MD8086}} | ||
+ | {{mpu | ||
+ | | name = AMD MD8086 | ||
+ | | no image = Yes | ||
+ | | image = | ||
+ | | image size = | ||
+ | | caption = | ||
+ | | designer = Intel | ||
+ | | manufacturer = AMD | ||
+ | | model number = MD8086 | ||
+ | | part number = MD8086 | ||
+ | | part number 1 = | ||
+ | | part number 2 = | ||
+ | | market = Military | ||
+ | | first announced = | ||
+ | | first launched = | ||
+ | | last order = | ||
+ | | last shipment = | ||
+ | |||
+ | | family = Am8086 | ||
+ | | series = M8086 | ||
+ | | locked = | ||
+ | | frequency = 5 MHz | ||
+ | | bus type = | ||
+ | | bus speed = 5 MHz | ||
+ | | bus rate = | ||
+ | | clock multiplier = | ||
+ | | s-spec = | ||
+ | | cpuid = | ||
+ | |||
+ | | microarch = 8086 | ||
+ | | platform = | ||
+ | | chipset = | ||
+ | | core name = 8086 | ||
+ | | core family = | ||
+ | | core model = | ||
+ | | core stepping = | ||
+ | | process = 3 µm | ||
+ | | transistors = 29,000 | ||
+ | | technology = nMOS | ||
+ | | die size = 33 mm² | ||
+ | | word size = 16 bit | ||
+ | | core count = 1 | ||
+ | | thread count = | ||
+ | | max cpus = 1 | ||
+ | | max memory = 1 MB | ||
+ | | max memory addr = 0xFFFFF | ||
+ | |||
+ | | electrical = Yes | ||
+ | | power = 2.5 W | ||
+ | | v core = 5 V | ||
+ | | v core tolerance = 10 % | ||
+ | | sdp = | ||
+ | | tdp = | ||
+ | | temp min = | ||
+ | | temp max = | ||
+ | | tjunc min = | ||
+ | | tjunc max = | ||
+ | | tcase min = -55 °C | ||
+ | | tcase max = 125 °C | ||
+ | | tstorage min = -65 °C | ||
+ | | tstorage max = 150 °C | ||
+ | |||
+ | | packaging = Yes | ||
+ | | package 0 = CerDIP-40 | ||
+ | | package 0 type = CerDIP | ||
+ | | package 0 pins = 40 | ||
+ | | package 0 pitch = 2.54 mm | ||
+ | | package 0 width = 15.75 mm | ||
+ | | package 0 length = 53.24 mm | ||
+ | | package 0 height = 5.5 mm | ||
+ | }} | ||
+ | '''MD8086''' is a [[second-source]]d {{intel|8086}} designed by Intel and manufactured by [[AMD]] in a 40-pin Ceramic DIP. This chip operated at 5 MHz. This model is rated for military use (Approved Product List, Class B) and is fully [[MIL-STD-883C]] compliant. | ||
+ | |||
+ | == Cache == | ||
+ | {{main|intel/microarchitectures/8086#Memory_Hierarchy|l1=8086 § Cache}} | ||
+ | {{cache info | ||
+ | |l1 cache=0 KB | ||
+ | |l1 break=1x0 KB | ||
+ | |l1 desc= | ||
+ | |l1 extra= | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | * Military grade | ||
+ | * ISA-compatible with {{intel|8080}} | ||
+ | * Direct addressing up to 1 MB | ||
+ | * 16-bit arithmetic |
Revision as of 00:50, 5 June 2016
Template:mpu MD8086 is a second-sourced 8086 designed by Intel and manufactured by AMD in a 40-pin Ceramic DIP. This chip operated at 5 MHz. This model is rated for military use (Approved Product List, Class B) and is fully MIL-STD-883C compliant.
Cache
- Main article: 8086 § Cache
Cache Info [Edit Values] | ||
L1$ | 0 KB "KB" is not declared as a valid unit of measurement for this property. |
1x0 KB |
Features
- Military grade
- ISA-compatible with 8080
- Direct addressing up to 1 MB
- 16-bit arithmetic