Semiconductor & Computer Engineering
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Difference between revisions of "intel/xeon e3/e3-1240 v5"
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|l2 desc=4-way set associative | |l2 desc=4-way set associative | ||
|l2 extra=(per core) | |l2 extra=(per core) | ||
| − | |l3 cache=8 | + | |l3 cache=8 MiB |
| − | |l3 break=4x2 | + | |l3 break=4x2 MiB |
| − | |||
| − | |||
}} | }} | ||
== Graphics == | == Graphics == | ||
Revision as of 01:06, 19 September 2016
Template:mpu The Xeon E3-1240 V5 is an entry-level workstations and servers 64-bit x86 quad-core microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 3.5 GHz with turbo boost of 3.9 GHz. The E3-1240 V5 has a TDP of 80 Watts and supports up to 64 GB of dual-channel DDR3/4. This MPU has no integrated graphics processor.
Cache
- Main article: Skylake § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 128 KB "KB" is not declared as a valid unit of measurement for this property. |
4x32 KB 8-way set associative (per core, write-back) |
| L1D$ | 128 KB "KB" is not declared as a valid unit of measurement for this property. |
4x32 KB 8-way set associative (per core, write-back) |
| L2$ | 1 MB "MB" is not declared as a valid unit of measurement for this property. |
4x256 KB 4-way set associative (per core) |
| L3$ | 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB |
4x2 MiB |
Graphics
This chip has no integrated graphics processing unit.
Memory controller
| Integrated Memory Controller | |
| Type | DDR3L-1333, DDR3L-1600, DDR3L-RS1333, DDR3L-RS1600, DDR4-1866, DDR4-2133, DDR4-RS1866, DDR4-RS2133 |
| Controllers | 1 |
| Channels | 2 |
| ECC Support | Yes |
| Max bandwidth | 34.1 GB/s |
| Max memory | 64 GB |
Expansions
Features
Facts about "Xeon E3-1240 v5 - Intel"
| l1d$ description | 8-way set associative + |
| l1i$ description | 8-way set associative + |
| l2$ description | 4-way set associative + |
| l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |