m |
(→Members) |
||
Line 54: | Line 54: | ||
! Part !! Description | ! Part !! Description | ||
|- | |- | ||
− | | {{ | + | | {{\|AM2901}}<br />{{\|AM2901A}}<br />{{\|AM2901B}} || [[4-bit architecture|4-bit]] [[ALU]] |
|- | |- | ||
− | | {{ | + | | {{\|AM2902}} || [[Carry-lookahead generator]] |
|- | |- | ||
− | | {{ | + | | {{\|AM2903}}<br />{{\|AM2903A}} || [[4-bit architecture|4-bit]] [[ALU]], Enhanced version of the {{amd|AM2901|2901}} |
|- | |- | ||
− | | {{ | + | | {{\|AM2904}} || Status and shift control unit |
|- | |- | ||
− | | {{ | + | | {{\|AM2905}} || Quad 2-input bus transceiver |
|- | |- | ||
− | | {{ | + | | {{\|AM2906}} || Quad 2-input bus transceiver with parity |
|- | |- | ||
− | | {{ | + | | {{\|AM2907}}<br />{{\|AM2908}} || Quad bus transceiver with interface logic |
|- | |- | ||
− | | {{ | + | | {{\|AM2909}}<br />{{\|AM2909A}}<br />{{\|AM2911}} || 4-bit-slice address sequencer |
|- | |- | ||
− | | {{ | + | | {{\|AM2910}} || 12-bit address sequencer |
|- | |- | ||
− | | {{ | + | | {{\|AM2912}} || Quad bus transceiver |
|- | |- | ||
− | | {{ | + | | {{\|AM2913}} || Priority [[interrupt]] expander |
|- | |- | ||
− | | {{ | + | | {{\|AM2914}} || Priority [[interrupt]] controller |
|- | |- | ||
− | | {{ | + | | {{\|AM2915}}<br />{{\|AM2916}}<br />{{\|AM2917}} || Quad 3-state bus transceiver |
|- | |- | ||
− | | {{ | + | | {{\|AM2918}}<br />{{\|AM29LS18}} || Quad D register |
|- | |- | ||
− | | {{ | + | | {{\|AM2919}} || Quad register |
|- | |- | ||
− | | {{ | + | | {{\|AM2920}} || Octal D [[flip-flip]] register |
|- | |- | ||
− | | {{ | + | | {{\|AM2921}} || 1-to-8 [[decoder]] |
|- | |- | ||
− | | {{ | + | | {{\|AM2922}}<br />{{\|AM2923}} || 8-input [[MUX]] |
|- | |- | ||
− | | {{ | + | | {{\|AM2924}} || 3-to-8 [[decoder]] |
|- | |- | ||
− | | {{ | + | | {{\|AM2925}} || [[Clock generator]] |
|- | |- | ||
− | | {{ | + | | {{\|AM2926}}<br />{{\|AM2929}} || 3-state quad bus driver |
|- | |- | ||
− | | {{ | + | | {{\|AM2927}}<br />{{\|AM2928}} || Quad 3-state Bus Transceiver |
|- | |- | ||
− | | {{ | + | | {{\|AM2930}} || Program control unit |
|- | |- | ||
− | | {{ | + | | {{\|AM2932}} || Program control unit for push/pop stack |
|- | |- | ||
− | | {{ | + | | {{\|AM2940}} || [[direct memory access|DMA]] Address generator |
|- | |- | ||
− | | {{ | + | | {{\|AM2940}} || [[Timer]]/[[Counter]]/[[direct memory access|DMA]] Address generator |
|- | |- | ||
− | | {{ | + | | {{\|AM2946}}<br />{{\|AM2947}}<br />{{\|AM2948}}<br />{{\|AM2949}} || Octal 3-state bidirectional bus transceiver |
|- | |- | ||
− | | {{ | + | | {{\|AM2950}}<br />{{\|AM2951}} || Bidirectional I/O Port |
|- | |- | ||
− | | {{ | + | | {{\|AM2954}}<br />{{\|AM2955}} || Octal registers |
|- | |- | ||
− | | {{ | + | | {{\|AM2956}}<br />{{\|AM2957}} || Octal latches |
|- | |- | ||
− | | {{ | + | | {{\|AM2958}}<br />{{\|AM2959}} || Octal buffer |
|- | |- | ||
− | | {{ | + | | {{\|AM2960}} || 16-bit error detection and correction unit |
|- | |- | ||
− | | {{ | + | | {{\|AM2961}}<br />{{\|AM2962}} || 4-bit error correction bus buffer |
|- | |- | ||
− | | {{ | + | | {{\|AM2964}} || Dynamic memory controller |
|- | |- | ||
− | | {{ | + | | {{\|AM2965}}<br />{{\|AM2966}} || Octal dynamic memory driver |
|} | |} | ||
Revision as of 05:59, 22 January 2016
The AMD Am2900 is a family of 4-bit bit-slice chips designed by Advanced Micro Devices and introduced to the market in August 1975. Each component represents an individual unit in a microprocessor. Designed to be flexible and expandable, those chips were capable of emulating a large number of existing systems. Made in bipolar technology allowed for higher speeds (1-20Mhz, later up to 32). Its flexibility, higher speed, unusually large amount of 2nd sources, and good marketing allowed AMD to dominate the bit-slice market. To date, the Am2900 family is used as the de facto baseline for bit-slice design.
2nd sources
The Am2900 had a large number of 2nd sources:
75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 | 96 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Motorola | |||||||||||||||||||||
Thomson-CSF | |||||||||||||||||||||
Raytheon | |||||||||||||||||||||
National | |||||||||||||||||||||
Fairchild | |||||||||||||||||||||
Signetics | |||||||||||||||||||||
NEC | |||||||||||||||||||||
OKI | |||||||||||||||||||||
Cypress | |||||||||||||||||||||
Vitesse | |||||||||||||||||||||
Elektronika |
Members
Family Members | |
---|---|
Part | Description |
AM2901 AM2901A AM2901B |
4-bit ALU |
AM2902 | Carry-lookahead generator |
AM2903 AM2903A |
4-bit ALU, Enhanced version of the 2901 |
AM2904 | Status and shift control unit |
AM2905 | Quad 2-input bus transceiver |
AM2906 | Quad 2-input bus transceiver with parity |
AM2907 AM2908 |
Quad bus transceiver with interface logic |
AM2909 AM2909A AM2911 |
4-bit-slice address sequencer |
AM2910 | 12-bit address sequencer |
AM2912 | Quad bus transceiver |
AM2913 | Priority interrupt expander |
AM2914 | Priority interrupt controller |
AM2915 AM2916 AM2917 |
Quad 3-state bus transceiver |
AM2918 AM29LS18 |
Quad D register |
AM2919 | Quad register |
AM2920 | Octal D flip-flip register |
AM2921 | 1-to-8 decoder |
AM2922 AM2923 |
8-input MUX |
AM2924 | 3-to-8 decoder |
AM2925 | Clock generator |
AM2926 AM2929 |
3-state quad bus driver |
AM2927 AM2928 |
Quad 3-state Bus Transceiver |
AM2930 | Program control unit |
AM2932 | Program control unit for push/pop stack |
AM2940 | DMA Address generator |
AM2940 | Timer/Counter/DMA Address generator |
AM2946 AM2947 AM2948 AM2949 |
Octal 3-state bidirectional bus transceiver |
AM2950 AM2951 |
Bidirectional I/O Port |
AM2954 AM2955 |
Octal registers |
AM2956 AM2957 |
Octal latches |
AM2958 AM2959 |
Octal buffer |
AM2960 | 16-bit error detection and correction unit |
AM2961 AM2962 |
4-bit error correction bus buffer |
AM2964 | Dynamic memory controller |
AM2965 AM2966 |
Octal dynamic memory driver |
Design
The family includes two 4-bit ALUs - 2901 and a 2903. The AM2901/A was the original chip designed, supporting 8 different basic operations. The AM2903/A was an enhanced version designed a bit later which included 7 additional operations. The slices can be stacked to produce 8, 12, or 16 data paths and memory addresses for use in larger programs.
This section is empty; you can help add the missing info by editing this page. |
This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information. |
Warning: Default sort key "Am2900" overrides earlier default sort key "Am2900, AMD".
designer | AMD + |
full page name | amd/am2900 + |
instance of | integrated circuit family + |
main designer | AMD + |
manufacturer | AMD + |
name | AMD Am2900 + |
package | DIP40 + and DIP42 + |
technology | Bipolar + |