From WikiChip
Difference between revisions of "marvell"
(add links) |
|||
| (5 intermediate revisions by 3 users not shown) | |||
| Line 2: | Line 2: | ||
{{semi company | {{semi company | ||
| name = Marvell | | name = Marvell | ||
| − | | logo = marvell logo. | + | | logo = marvell logo.png |
| logo size = 250px | | logo size = 250px | ||
| type = Public | | type = Public | ||
| Line 15: | Line 15: | ||
| module 1 = <!--{{manufacturer id | | module 1 = <!--{{manufacturer id | ||
| logo1 = [[File:ic logo (xxxxxxxx).svg]] | | logo1 = [[File:ic logo (xxxxxxxx).svg]] | ||
| − | | package1 = [[File:ic example (xxxxxxx).svg]] | + | | package1 = [[File:ic example (xxxxxxx).svg]]--> |
| − | |||
}} | }} | ||
| − | '''Marvell Technology Group Ltd.''' or '''Marvell Technology''' is an American | + | '''Marvell Technology Group Ltd.''' or '''Marvell Technology''' is an American fabless semiconductor company. |
| + | :Marvell primarily focuses on communication, storage, and embedded semiconductor products. | ||
| − | On November 20 2017, [[Marvell]] announced they will be acquiring [[Cavium]] in a $6 billion deal. This was completed July 6, 2018. | + | * On November 20 2017, [[Marvell]] announced they will be acquiring [[Cavium]] in a $6 billion deal. |
| + | :This was completed July 6, 2018. | ||
| + | *The Berlin family was acquired by [[Synaptics]] from [[Marvell]] in 2017. | ||
== List of processor families == | == List of processor families == | ||
| + | {{collist | ||
| + | | count = 3 | ||
| + | | | ||
* {{marvell|ARMADA}} | * {{marvell|ARMADA}} | ||
| − | * {{cavium|ThunderX}} | + | * {{marvell|AVANTA}} |
| − | * {{cavium|ThunderX2}} | + | * {{marvell|Berlin}} |
| + | * {{marvell|Dove}} | ||
| + | * {{marvell|Discovery}} | ||
| + | * {{marvell|Kirkwood}} | ||
| + | * {{marvell|Orion}} | ||
| + | * {{marvell|Storage}} | ||
| + | * {{cavium|ThunderX}} ([[Cavium]]) | ||
| + | * {{cavium|ThunderX2}} ([[Cavium]]) | ||
| + | * {{marvell|ThunderX3}} ([[Cavium]]) | ||
| + | * {{marvell|XScale}} ([[Intel]]) | ||
| + | }} | ||
== List of microarchitectures == | == List of microarchitectures == | ||
| + | {{collist | ||
| + | | count = 3 | ||
| + | | | ||
| + | * {{marvell|Feroceon|l=arch}} | ||
| + | * {{marvell|Flareon|l=arch}} | ||
| + | * {{marvell|Jolteon|l=arch}} | ||
* {{marvell|Mohawk|l=arch}} | * {{marvell|Mohawk|l=arch}} | ||
* {{marvell|Sheeva PJ1|l=arch}} | * {{marvell|Sheeva PJ1|l=arch}} | ||
* {{marvell|Sheeva PJ4|l=arch}} | * {{marvell|Sheeva PJ4|l=arch}} | ||
| + | }} | ||
| + | |||
| + | == Chipsets == | ||
| + | :; [[WikiChip:wanted chips#Marvell]] | ||
| + | |||
| + | === CPU Cores === | ||
| + | *The ''XScale'' cores were designed by [[Intel]], and shipped by [[Marvell]] in the older ''PXA'' processors. | ||
| + | *''Feroceon'' is a [[Marvell]] designed core that developed in-house, and that evolved into ''Sheeva''. | ||
| + | *The ''XScale'' and ''Feroceon'' cores were phased out over time and replaced with ''Sheeva'' cores | ||
| + | :in later products, which subsequently got replaced with licensed [[ARM]] ''Cortex-A'' cores. | ||
| + | |||
| + | ;XScale 1 | ||
| + | :CPUID 0x69052xxx (ARMv5, iWMMXt) | ||
| + | ;XScale 2 | ||
| + | :CPUID 0x69054xxx (ARMv5, iWMMXt) | ||
| + | ;XScale 3 | ||
| + | :CPUID 0x69056xxx (ARMv5, iWMMXt) | ||
| + | |||
| + | ;Feroceon 88fr131 • “Mohawk-D” | ||
| + | :CPUID 0x5625131x (ARMv5TE, single-issue in-order) | ||
| + | ;Feroceon-1850 88fr331 • “Mohawk” | ||
| + | :CPUID 0x5615331x or 0x41xx926x (ARMv5TE, single issue) | ||
| + | ;Feroceon-2850 88fr531-vd • “Jolteon” | ||
| + | :CPUID 0x5605531x or 0x41xx926x (ARMv5TE, VFP, dual-issue) | ||
| + | ;Feroceon 88fr571-vd • “Jolteon” | ||
| + | :CPUID 0x5615571x (ARMv5TE, VFP, dual-issue) | ||
| + | |||
| + | ;Sheeva PJ1 88sv331 • “Mohawk” | ||
| + | :CPUID 0x561584xx (ARMv5, single-issue iWMMXt v2) | ||
| + | ;Sheeva PJ4 88sv581x • “Flareon” | ||
| + | :CPUID 0x560f581x (ARMv7, idivt, optional iWMMXt v2) | ||
| + | ;Sheeva PJ4B 88sv581x • “Flareon” | ||
| + | :CPUID 0x561f581x (ARMv7, idivt, optional iWMMXt v2) | ||
| + | ;Sheeva PJ4B-MP / PJ4C | ||
| + | :CPUID 0x562f584x (ARMv7, idivt/idiva, LPAE, optional iWMMXt v2 and/or NEON) | ||
| + | |||
| + | :;Comments | ||
| + | The ''PXA'' line of SoCs originates from the ''XScale'' family developed by [[Intel]] and acquired by [[Marvell]] in ~2006. | ||
| + | :All the processors of this ''MMP/MMP2'' family were developed by [[Marvell]]. | ||
| + | Due to their ''XScale'' origin, these SoCs have virtually nothing in common with the other (''Kirkwood, Dove'', etc.) | ||
| + | :families of [[Marvell]] SoCs, except with the ''PXA'' family of SoCs listed above. | ||
Latest revision as of 17:55, 12 December 2024
| Marvell | |
| | |
| Type | Public |
| Founded | 1995 |
| Founder | Sehat Sutardja Weili Dai Pantas Sutardja |
| Headquarters | Santa Clara, California |
| Website | http://www.marvell.com/ |
Marvell Technology Group Ltd. or Marvell Technology is an American fabless semiconductor company.
- Marvell primarily focuses on communication, storage, and embedded semiconductor products.
- This was completed July 6, 2018.
List of processor families[edit]
List of microarchitectures[edit]
Chipsets[edit]
CPU Cores[edit]
- The XScale cores were designed by Intel, and shipped by Marvell in the older PXA processors.
- Feroceon is a Marvell designed core that developed in-house, and that evolved into Sheeva.
- The XScale and Feroceon cores were phased out over time and replaced with Sheeva cores
- in later products, which subsequently got replaced with licensed ARM Cortex-A cores.
- XScale 1
- CPUID 0x69052xxx (ARMv5, iWMMXt)
- XScale 2
- CPUID 0x69054xxx (ARMv5, iWMMXt)
- XScale 3
- CPUID 0x69056xxx (ARMv5, iWMMXt)
- Feroceon 88fr131 • “Mohawk-D”
- CPUID 0x5625131x (ARMv5TE, single-issue in-order)
- Feroceon-1850 88fr331 • “Mohawk”
- CPUID 0x5615331x or 0x41xx926x (ARMv5TE, single issue)
- Feroceon-2850 88fr531-vd • “Jolteon”
- CPUID 0x5605531x or 0x41xx926x (ARMv5TE, VFP, dual-issue)
- Feroceon 88fr571-vd • “Jolteon”
- CPUID 0x5615571x (ARMv5TE, VFP, dual-issue)
- Sheeva PJ1 88sv331 • “Mohawk”
- CPUID 0x561584xx (ARMv5, single-issue iWMMXt v2)
- Sheeva PJ4 88sv581x • “Flareon”
- CPUID 0x560f581x (ARMv7, idivt, optional iWMMXt v2)
- Sheeva PJ4B 88sv581x • “Flareon”
- CPUID 0x561f581x (ARMv7, idivt, optional iWMMXt v2)
- Sheeva PJ4B-MP / PJ4C
- CPUID 0x562f584x (ARMv7, idivt/idiva, LPAE, optional iWMMXt v2 and/or NEON)
- Comments
The PXA line of SoCs originates from the XScale family developed by Intel and acquired by Marvell in ~2006.
- All the processors of this MMP/MMP2 family were developed by Marvell.
Due to their XScale origin, these SoCs have virtually nothing in common with the other (Kirkwood, Dove, etc.)
- families of Marvell SoCs, except with the PXA family of SoCs listed above.
Facts about "Marvell Technology"
| company type | public + |
| founded | 1995 + |
| founder | Sehat Sutardja +, Weili Dai + and Pantas Sutardja + |
| full page name | marvell + |
| headquarters | Santa Clara, California + |
| instance of | semiconductor company + |
| name | Marvell + |
| website | http://www.marvell.com/ + |
| wikidata id | Q1347782 + |