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Difference between revisions of "intel/core i7ee/i7-5960x"
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{{intel title|Core i7-5960X Extreme Edition}} | {{intel title|Core i7-5960X Extreme Edition}} | ||
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| name = Core i7-5960X Extreme Edition | | name = Core i7-5960X Extreme Edition | ||
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== Expansions == | == Expansions == | ||
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| pcie revision = 3.00 | | pcie revision = 3.00 | ||
| pcie lanes = 40 | | pcie lanes = 40 | ||
Latest revision as of 15:24, 13 December 2017
| Edit Values | |
| Core i7-5960X Extreme Edition | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | i7-5960X |
| Part Number | CM8064801547964, BX80648I75960X, BXC80648I75960X |
| S-Spec | SR20Q QFRA (QS) |
| Market | Desktop |
| Introduction | August 29, 2014 (announced) August 29, 2014 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | Core i7EE |
| Series | i7-5900 |
| Locked | No |
| Frequency | 3000 MHz |
| Turbo Frequency | Yes |
| Turbo Frequency | 3500 MHz (1 core), 3500 MHz (2 cores), 3300 MHz (3 cores), 3300 MHz (4 cores), 3300 MHz (5 cores), 3300 MHz (6 cores), 3300 MHz (7 cores), 3300 MHz (8 cores) |
| Bus type | DMI 2.0 |
| Bus rate | 5 GT/s |
| Clock multiplier | 30 |
| CPUID | 306F2 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Haswell |
| Platform | X99 |
| Core Name | Haswell E |
| Core Stepping | M0, R2 |
| Process | 22 nm |
| Transistors | 2,600,000,000 |
| Technology | CMOS |
| Die | 355.52 mm² 20.2 mm × 17.6 mm |
| Word Size | 64 bit |
| Cores | 8 |
| Threads | 16 |
| Max Memory | 64 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| TDP | 140 W |
| OP Temperature | 0 °C – 66.8 °C |
The Core i7-5960X Extreme Edition is a 64-bit octa-core top-of-the-line MPU introduced by Intel for the enthusiasts market in mid-2014. The i7-5960X replaces the i7-4960X, as Intel's flagship microprocessor based on Haswell microarchitecture. This chip operates at 3 GHz with turbo frequency of up to 3.5 GHz for a single core. The i7-5960X supports up to 64 GiB of memory (DDR4). This processor was eventually replaced by i7-6950X, a Broadwell-based model.
Cache[edit]
- Main article: Haswell § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 256 KiB 262,144 B 0.25 MiB |
8x32 KiB 8-way set associative (per core) |
| L1D$ | 256 KiB 262,144 B 0.25 MiB |
8x32 KiB 8-way set associative (per core) |
| L2$ | 2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB |
8x256 KiB 8-way set associative (per core) |
| L3$ | 20 MiB 20,480 KiB 20,971,520 B 0.0195 GiB |
8x2.5 MiB 20-way set associative (shared) |
Graphics[edit]
This SoC has no integrated graphics processing unit.
Memory controller[edit]
| Integrated Memory Controller | |
| Type | DDR4-1600, DDR4-1866, DDR4-2133 |
| Controllers | 1 |
| Channels | 4 |
| ECC Support | No |
| Max bandwidth | 68 GB/s |
| Max memory | 64 GiB |
Expansions[edit]
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Expansion Options
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Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Die Shot[edit]
- 2,600,000,000 transistors
- 355.52 mm2
- 17.6 mm x 20.2 mm
_die_shot.png)
_die_shot_(annotated).png)
See also[edit]
Facts about "Core i7-5960X Extreme Edition - Intel"
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology + and Extended Page Tables + |
| has intel enhanced speedstep technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
| l3$ description | 20-way set associative + |
| l3$ size | 20 MiB (20,480 KiB, 20,971,520 B, 0.0195 GiB) + |