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Difference between revisions of "intel/core i7/i7-8550u"
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{{intel title|Core i7-8550U}}
 
{{intel title|Core i7-8550U}}
−
{{mpu
+
{{chip
−
| future             = Yes
+
|future=Yes
−
| name               = Core i7-8550U
+
|name=Core i7-8550U
−
| no image           = Yes
+
|no image=Yes
−
| image               =
+
|image=kaby lake r (front).png
−
| image size          =
+
|designer=Intel
−
| caption            =  
+
|manufacturer=Intel
−
| designer           = Intel
+
|model number=i7-8550U
−
| manufacturer       = Intel
+
|part number=FJ8067703281816
−
| model number       = i7-8550U
+
|s-spec=SR3LC
−
| part number         =
+
|market=Mobile
−
| part number 2      =
+
|first announced=August 21, 2017
−
| part number 3      =
+
|first launched=August 21, 2017
−
| part number 4      =
+
|release price=$409.00
−
| s-spec              =  
+
|family=Core i7
−
| s-spec 2            =  
+
|series=i7-8000
−
| market             = Mobile
+
|locked=Yes
−
| first announced     = June, 2017
+
|frequency=1,800 MHz
−
| first launched     =
+
|turbo frequency1=4,000 MHz
−
| last order          =
+
|turbo frequency2=4,000 MHz
−
| last shipment      =  
+
|turbo frequency3=3,700 MHz
−
| release price       =  
+
|turbo frequency4=3,700 MHz
−
 
+
|turbo frequency=Yes
−
| family             = Core i7
+
|bus type=OPI
−
| series             = i7-8500
+
|bus rate=4 GT/s
−
| locked             = Yes
+
|clock multiplier=18
−
| frequency           =  
+
|isa=x86-64
−
| turbo frequency    = Yes
+
|isa family=x86
−
| turbo frequency1   =  
+
|microarch=Kaby Lake
−
| turbo frequency2   =  
+
|platform=Kaby Lake
−
| turbo frequency3   =  
+
|core name=Kaby Lake R
−
| turbo frequency4   =  
+
|core family=6
−
| bus type            = OPI
+
|core model=142
−
| bus speed          =  
+
|core stepping=Y0
−
| bus rate           = 4 GT/s
+
|process=14 nm
−
| bus links          =
+
|technology=CMOS
−
| clock multiplier   =  
+
|die area=123 mm²
−
| cpuid              =
+
|word size=64 bit
−
 
+
|core count=4
−
| isa family          = x86
+
|thread count=8
−
| isa                 = x86-64
+
|max cpus=1
−
| microarch           = Coffee Lake
+
|max memory=32 GiB
−
| platform           = Coffee Lake
+
|v core min=0.55 V
−
| chipset            =
+
|v core max=1.52 V
−
| core name           = Coffee Lake U
+
|tdp=15 W
−
| core family         =  
+
|ctdp down=10 W
−
| core model         =  
+
|ctdp down frequency=800 MHz
−
| core stepping       =  
+
|ctdp up=25 W
−
| process             = 14 nm
+
|ctdp up frequency=2,000 MHz
−
| transistors        =
+
|tjunc min=0 °C
−
| technology         = CMOS
+
|tjunc max=100 °C
−
| die area           =
+
|tstorage min=-25 °C
−
| die width          =
+
|tstorage max=125 °C
−
| die length          =  
+
|package module 1={{packages/intel/fcbga-1356}}
−
| word size           = 64 bit
 
−
| core count         = 4
 
−
| thread count       = 8
 
−
| max cpus           = 1
 
−
| max memory         = 32 GiB
 
−
 
 
−
 
 
−
| v core min         = 0.55 V
 
−
| v core max         = 1.52 V
 
−
| v io                =
 
−
| v io tolerance      =
 
−
| v io 2              =
 
−
| sdp                =
 
−
| tdp                 = 15 W
 
−
| ctdp down           =  
 
−
| ctdp down frequency =  
 
−
| ctdp up             =  
 
−
| ctdp up frequency   =  
 
−
| tjunc min           = 0 °C
 
−
| tjunc max           = 100 °C
 
−
| tcase min          =
 
−
| tcase max          =
 
−
| tstorage min       = -25 °C
 
−
| tstorage max       = 125 °C
 
−
| tambient min        =
 
−
| tambient max        =
 
−
 
 
−
| packaging          =
 
−
| package           =
 
−
| package type      =
 
−
| package pitch      =
 
−
| package size      =
 
−
| socket            =
 
−
| socket type        =  
 
 
}}
 
}}
−
'''Core i7-8550U''' is a {{arch|64}} [[quad-core]] performance [[x86]] mobile microprocessor set to be introduced by [[Intel]] in late [[2017]]. This processor, which is based on the {{intel|Coffee Lake|l=arch}} microarchitecture, is manufactured on Intel's 3rd generation enhanced [[14 nm process|14nm++ process]]. The i7-8550U operates at ? GHz with a TDP of 15 W and with a {{intel|Turbo Boost}} frequency of ? GHz for a single active core. This MPU supports up to 32 GiB of dual-channel non-ECC DDR4-2133 memory.
+
'''Core i7-8550U''' is a {{arch|64}} [[quad-core]] performance [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2017]]. This processor, which is based on an enhanced version of the {{intel|Kaby Lake|l=arch}} microarchitecture, is manufactured on Intel's 2nd generation enhanced [[14 nm process|14nm+ process]]. The i7-8550U operates at 1.8 GHz with a TDP of 15 W and {{intel|Turbo Boost}} frequency of up to 4 GHz. This MPU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates Intel's {{intel|UHD Graphics 620}} [[IGP]] operating at 300 MHz with a burst frequency of 1.15 GHz.
  
−
 
+
This model has a configurable TDP-down of 10 W at 800 MHz and a TDP-up of 25 W at 2 GHz.
−
{{unknown features}}
 
  
 
== Cache ==
 
== Cache ==
−
{{main|intel/microarchitectures/coffee_lake#Memory_Hierarchy|l1=Coffee Lake § Cache}}
+
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
 
{{cache size
 
{{cache size
 
|l1 cache=256 KiB
 
|l1 cache=256 KiB
Line 117: Line 82:
 
== Memory controller ==
 
== Memory controller ==
 
{{memory controller
 
{{memory controller
−
|type=LPDDR3-1866
+
|type=DDR4-2400
−
|type 2=DDR3L-1600
+
|type 2=LPDDR3-2133
−
|type 3=DDR4-2133
 
 
|ecc=No
 
|ecc=No
−
|max mem=32 GiB
+
|max mem=64GiB
 
|controllers=1
 
|controllers=1
 
|channels=2
 
|channels=2
−
|max bandwidth=31.79 GiB/s
+
|max bandwidth=35.76 GiB/s
−
|bandwidth schan=15.89 GiB/s
+
|bandwidth schan=17.88 GiB/s
−
|bandwidth dchan=31.79 GiB/s
+
|bandwidth dchan=35.76 GiB/s
 
}}
 
}}
  
 
== Expansions ==
 
== Expansions ==
−
{{expansions
+
{{expansions main
−
| pcie revision     = 3.0
+
|
−
| pcie lanes         = 12
+
{{expansions entry
−
| pcie config       = 1x4
+
|type=PCIe
−
| pcie config 2     = 2x2
+
|pcie revision=3.0
−
| pcie config 3     = 1x2+2x1
+
|pcie lanes=12
−
| pcie config 4     = 4x1
+
|pcie config=1x4
 +
|pcie config 2=2x2
 +
|pcie config 3=1x2+2x1
 +
|pcie config 4=4x1
 +
}}
 
}}
 
}}
  
 
== Graphics ==
 
== Graphics ==
−
{{empty section}}
+
{{integrated graphics
 +
| gpu                = UHD Graphics 620
 +
| device id          = 0x5917
 +
| designer            = Intel
 +
| execution units    = 24
 +
| max displays        = 3
 +
| max memory          = 32 GiB
 +
| frequency          = 300 MHz
 +
| max frequency      = 1,150 MHz
 +
 
 +
| output crt          =
 +
| output sdvo        =
 +
| output dsi          =
 +
| output edp          = Yes
 +
| output dp          = Yes
 +
| output hdmi        = Yes
 +
| output vga          =
 +
| output dvi          = Yes
 +
 
 +
| directx ver        = 12
 +
| opengl ver        = 4.4
 +
| opencl ver        = 2.0
 +
| hdmi ver          = 1.4a
 +
| dp ver            = 1.2
 +
| edp ver            = 1.4
 +
| max res hdmi      = 4096x2304
 +
| max res hdmi freq  = 24 Hz
 +
| max res dp        = 4096x2304
 +
| max res dp freq    = 60 Hz
 +
| max res edp        = 4096x2304
 +
| max res edp freq  = 60 Hz
 +
| max res vga        =
 +
| max res vga freq  =
 +
 
 +
| features            = Yes
 +
| intel quick sync    = Yes
 +
| intel intru 3d      = Yes
 +
| intel insider        =
 +
| intel widi          =
 +
| intel fdi            =
 +
| intel clear video    = Yes
 +
| intel clear video hd = Yes
 +
}}
 +
{{kaby lake hardware accelerated video table|col=1}}
  
 
== Features ==  
 
== Features ==  
Line 152: Line 163:
 
|x8664=Yes
 
|x8664=Yes
 
|nx=Yes
 
|nx=Yes
−
|3dnow=No
 
−
|e3dnow=No
 
 
|mmx=Yes
 
|mmx=Yes
 
|emmx=Yes
 
|emmx=Yes
Line 162: Line 171:
 
|sse41=Yes
 
|sse41=Yes
 
|sse42=Yes
 
|sse42=Yes
−
|sse4a=No
+
|sse4a=Yes
 
|avx=Yes
 
|avx=Yes
 
|avx2=Yes
 
|avx2=Yes
−
 
+
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 
|abm=Yes
 
|abm=Yes
 
|tbm=No
 
|tbm=No
Line 187: Line 207:
 
|flex=Yes
 
|flex=Yes
 
|fastmem=No
 
|fastmem=No
 +
|ivmd=No
 +
|intelnodecontroller=No
 +
|intelnode=No
 +
|kpt=No
 +
|ptt=No
 +
|intelrunsure=No
 +
|mbe=No
 
|isrt=Yes
 
|isrt=Yes
 
|sba=No
 
|sba=No
Line 192: Line 219:
 
|sipp=No
 
|sipp=No
 
|att=No
 
|att=No
−
|ipt=No
+
|ipt=Yes
 
|tsx=No
 
|tsx=No
 
|txt=No
 
|txt=No
Line 204: Line 231:
 
|securekey=Yes
 
|securekey=Yes
 
|osguard=Yes
 
|osguard=Yes
 +
|intqat=No
 +
|3dnow=No
 +
|e3dnow=No
 
|smartmp=No
 
|smartmp=No
 
|powernow=No
 
|powernow=No
 +
|amdvi=No
 
|amdv=No
 
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 
|rvi=No
 
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 
}}
 
}}
 +
 +
== Die Shot ==
 +
{{see also|intel/microarchitectures/kaby_lake#Die|l1=Kaby Lake § Die Shot}}
 +
A die shot of Intel's Kaby Lake R [[Quad Core]] mobile processors:
 +
 +
* [[14 nm process|14 nm+ process]]
 +
* 11 metal layers
 +
* 123 mm² die size
 +
* 4 CPU cores + 24 GPU EUs
 +
 +
 +
: [[File:kaby lake r die shot.png|650px]]
 +
 +
 +
: [[File:kaby lake r die shot (annotated).png|650px]]

Latest revision as of 01:57, 20 July 2023

Edit Values
Core i7-8550U
kaby lake r (front).png
General Info
DesignerIntel
ManufacturerIntel
Model Numberi7-8550U
Part NumberFJ8067703281816
S-SpecSR3LC
MarketMobile
IntroductionAugust 21, 2017 (announced)
August 21, 2017 (launched)
Release Price$409.00
ShopAmazon
General Specs
FamilyCore i7
Seriesi7-8000
LockedYes
Frequency1,800 MHz
Turbo FrequencyYes
Turbo Frequency4,000 MHz (1 core),
4,000 MHz (2 cores),
3,700 MHz (3 cores),
3,700 MHz (4 cores)
Bus typeOPI
Bus rate4 GT/s
Clock multiplier18
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureKaby Lake
PlatformKaby Lake
Core NameKaby Lake R
Core Family6
Core Model142
Core SteppingY0
Process14 nm
TechnologyCMOS
Die123 mm²
Word Size64 bit
Cores4
Threads8
Max Memory32 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.55 V-1.52 V
TDP15 W
cTDP down10 W
cTDP down frequency800 MHz
cTDP up25 W
cTDP up frequency2,000 MHz
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCBGA-1356 (BGA)
Dimension42 mm x 24 mm x 1.3 mm
Pitch0.65 mm
Ball Count1356
Ball CompSAC405
InterconnectBGA-1356

Core i7-8550U is a 64-bit quad-core performance x86 mobile microprocessor introduced by Intel in mid-2017. This processor, which is based on an enhanced version of the Kaby Lake microarchitecture, is manufactured on Intel's 2nd generation enhanced 14nm+ process. The i7-8550U operates at 1.8 GHz with a TDP of 15 W and Turbo Boost frequency of up to 4 GHz. This MPU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates Intel's UHD Graphics 620 IGP operating at 300 MHz with a burst frequency of 1.15 GHz.

This model has a configurable TDP-down of 10 W at 800 MHz and a TDP-up of 25 W at 2 GHz.

Cache[edit]

Main article: Kaby Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB16-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2400, LPDDR3-2133
Supports ECCNo
Max Mem64GiB
Controllers1
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 12
Configuration: 1x4, 2x2, 1x2+2x1, 4x1


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUUHD Graphics 620
DesignerIntelDevice ID0x5917
Execution Units24Max Displays3
Max Memory32 GiB
32,768 MiB
33,554,432 KiB
34,359,738,368 B
Frequency300 MHz
0.3 GHz
300,000 KHz
Burst Frequency1,150 MHz
1.15 GHz
1,150,000 KHz
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4096x2304 @24 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz
Standards
DirectX12
OpenGL4.4
OpenCL2.0
DP1.2
eDP1.4
HDMI1.4a
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
SSTSpeed Shift Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Flex MemoryFlex Memory Access
ISRTSmart Response Technology
MWTMy WiFi Technology
IPTIdentity Protection Technology

Die Shot[edit]

See also: Kaby Lake § Die Shot

A die shot of Intel's Kaby Lake R Quad Core mobile processors:

  • 14 nm+ process
  • 11 metal layers
  • 123 mm² die size
  • 4 CPU cores + 24 GPU EUs


kaby lake r die shot.png


kaby lake r die shot (annotated).png
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i7/i7-8550u&oldid=101854"
Facts about "Core i7-8550U - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i7-8550U - Intel#io +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology + and My WiFi Technology +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has intel my wifi technology supporttrue +
has intel secure key technologytrue +
has intel smart response technology supporttrue +
has intel speed shift technologytrue +
has intel supervisor mode execution protectiontrue +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description16-way set associative +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max pcie lanes12 +
supported memory typeLPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +