From WikiChip
Difference between revisions of "intel/xeon e5/e5-2658 v4"
m (Bot: Automated text replacement (-\| electrical += Yes +)) |
m (Bot: moving all {{mpu}} to {{chip}}) |
||
(3 intermediate revisions by the same user not shown) | |||
Line 1: | Line 1: | ||
{{intel title|Xeon E5-2658 v4}} | {{intel title|Xeon E5-2658 v4}} | ||
− | {{ | + | {{chip |
| name = Xeon E5-2658 v4 | | name = Xeon E5-2658 v4 | ||
| no image = Yes | | no image = Yes | ||
Line 10: | Line 10: | ||
| model number = E5-2658 v4 | | model number = E5-2658 v4 | ||
| part number = CM8066002044801 | | part number = CM8066002044801 | ||
− | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
+ | | part number 4 = | ||
| market = Embedded | | market = Embedded | ||
| first announced = June 20, 2016 | | first announced = June 20, 2016 | ||
Line 135: | Line 135: | ||
== Expansions == | == Expansions == | ||
− | {{ | + | {{expansions |
| pcie revision = 3.0 | | pcie revision = 3.0 | ||
| pcie lanes = 40 | | pcie lanes = 40 | ||
Line 144: | Line 144: | ||
== Features == | == Features == | ||
− | {{ | + | {{x86 features |
| em64t = Yes | | em64t = Yes | ||
| nx = Yes | | nx = Yes |
Latest revision as of 15:27, 13 December 2017
Edit Values | |
Xeon E5-2658 v4 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | E5-2658 v4 |
Part Number | CM8066002044801 |
S-Spec | SR2NB QK9A (QS) |
Market | Embedded |
Introduction | June 20, 2016 (announced) June 20, 2016 (launched) |
Release Price | $1832 |
Shop | Amazon |
General Specs | |
Family | Xeon E5 |
Series | E5-2000 |
Locked | Yes |
Frequency | 2,300 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 2,800 MHz (1 core), 2,800 MHz (2 cores), 2,800 MHz (3 cores), 2,500 MHz (4 cores), 2,500 MHz (5 cores), 2,500 MHz (6 cores), 2,500 MHz (7 cores), 2,500 MHz (8 cores), 2,500 MHz (9 cores), 2,500 MHz (10 cores), 2,500 MHz (11 cores), 2,500 MHz (12 cores), 2,500 MHz (13 cores), 2,500 MHz (14 cores) |
Bus type | QPI |
Bus speed | 4,800 MHz |
Bus rate | 2 × 9.6 GT/s |
Clock multiplier | 23 |
CPUID | 406F1 |
Microarchitecture | |
Microarchitecture | Broadwell |
Platform | Grantley EP 2S |
Chipset | C610 Series |
Core Name | Broadwell EP |
Core Family | 6 |
Core Model | 4F |
Core Stepping | M0 |
Process | 14 nm |
Transistors | 4,700,000,000 |
Technology | CMOS |
Die | 306.18 mm² |
Word Size | 64 bit |
Cores | 14 |
Threads | 28 |
Max Memory | 1,536 GiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Electrical | |
Vcore | 1.82 V |
VI/O | 1.2 V ± 3% |
TDP | 105 W |
Tcase | 0 °C – 91 °C |
Tstorage | -25 °C – 125 °C |
The Xeon E5-2658 v4 is a 64-bit tetradeca-core x86 microprocessor introduced by Intel in 2016. This embedded server MPU is designed for 2S environments. Operating at 2.3 GHz with a turbo boost frequency of 2.8 GHz for a single active core, this MPU has a TDP of 105 W and is manufactured on a 14 nm process (based on Broadwell).
Cache[edit]
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 448 KiB 458,752 B 0.438 MiB |
14x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 448 KiB 458,752 B 0.438 MiB |
14x32 KiB 8-way set associative (per core, write-back) |
L2$ | 3.5 MiB 3,584 KiB 3,670,016 B 0.00342 GiB |
14x256 KiB 8-way set associative (per core, write-back) |
L3$ | 35 MiB 35,840 KiB 36,700,160 B 0.0342 GiB |
14x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics[edit]
This microprocessor has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller | |
Type | DDR4-2400 |
Controllers | 1 |
Channels | 4 |
ECC Support | Yes |
Max bandwidth | 71.53 GiB/s |
Bandwidth (single) | 17.88 GiB/s |
Bandwidth (dual) | 35.76 GiB/s |
Max memory | 1,536 GiB |
Physical Address Extensions | 46 bit |
Expansions[edit]
Expansion Options
|
||||||||
|
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
|
||||||||||||||||||||||||||||||||||||||||
|
Facts about "Xeon E5-2658 v4 - Intel"
l1d$ description | 8-way set associative + |
l1d$ size | 448 KiB (458,752 B, 0.438 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 448 KiB (458,752 B, 0.438 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 3.5 MiB (3,584 KiB, 3,670,016 B, 0.00342 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 35 MiB (35,840 KiB, 36,700,160 B, 0.0342 GiB) + |