Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "loongson/godson 2/2a"
m (Bot: Automated text replacement (-\| electrical += Yes +)) |
m (Bot: moving all {{mpu}} to {{chip}}) |
||
| (One intermediate revision by the same user not shown) | |||
| Line 1: | Line 1: | ||
{{loongson title|Godson-2A}} | {{loongson title|Godson-2A}} | ||
| − | {{ | + | {{chip |
| name = Godson-2A | | name = Godson-2A | ||
| image = | | image = | ||
| Line 10: | Line 10: | ||
| model number = 2A | | model number = 2A | ||
| part number = | | part number = | ||
| − | | part number | + | | part number 2 = |
| market = Desktop | | market = Desktop | ||
| first announced = 2003 | | first announced = 2003 | ||
Latest revision as of 15:31, 13 December 2017
| Edit Values | |
| Godson-2A | |
| General Info | |
| Designer | Loongson |
| Manufacturer | SMICS |
| Model Number | 2A |
| Market | Desktop |
| Introduction | 2003 (announced) |
| General Specs | |
| Family | Godson 2 |
| Series | Godson 2 |
| Frequency | 250 MHz |
| Microarchitecture | |
| ISA | MIPS64 (MIPS) |
| Microarchitecture | GS464 |
| Core Name | GS464 |
| Process | 180 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 1 |
| Threads | 1 |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| Power dissipation | 3 W |
Godson-2A (龙芯2A) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. The Godson-2A operated at up to 250 MHz consuming up to 3 W. This chip was manufactured on SMICS' 0.18 µm process.
This chip reached tapeout on July 13, 2003. This chip consequently failed validation and was scrapped. It was eventually replaced by the 2B model.
Cache[edit]
- Main article: GS464 § Cache
 |
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
||||||||||||
|
|||||||||||||