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Difference between revisions of "Template:10 nm comp header"

 
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  ! style="text-align: right;" | Height
 
  ! style="text-align: right;" | Height
 
  |-
 
  |-
−
  ! style="text-align: right;" colspan="2" | Gate Pitch (L<sub>g</sub>)
+
  ! style="text-align: right;" colspan="2" | Gate Length (L<sub>g</sub>)
 
  |-
 
  |-
 
  ! style="text-align: right;" colspan="2" | Contacted Gate Pitch (CPP)
 
  ! style="text-align: right;" colspan="2" | Contacted Gate Pitch (CPP)
 
  |-
 
  |-
−
  ! style="text-align: right;" colspan="2" | Interconnect Pitch (M1P)
+
  ! style="text-align: right;" colspan="2" | Minimum Metal Pitch (MMP)
 
  |-
 
  |-
 
  ! style="text-align: right;" rowspan="3" | SRAM bitcell || style="text-align: right;" | High-Perf (HP)
 
  ! style="text-align: right;" rowspan="3" | SRAM bitcell || style="text-align: right;" | High-Perf (HP)

Latest revision as of 05:29, 6 April 2017

 
Process Name
1st Production
Lithography Lithography
Immersion
Exposure
Wafer Type
Size
Transistor Type
Voltage
 
Fin Pitch
Width
Height
Gate Length (Lg)
Contacted Gate Pitch (CPP)
Minimum Metal Pitch (MMP)
SRAM bitcell High-Perf (HP)
High-Density (HD)
Low-Voltage (LV)
DRAM bitcell eDRAM
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