Semiconductor & Computer Engineering
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Difference between revisions of "Template:abbr"
(Typo.) |
(ATE, C4, FSB, HDCP, MSR, MST, NDA, S/PDIF.) |
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-->|1dpc=<abbr title="One DIMM Per Channel">{{{1}}}</abbr><!-- | -->|1dpc=<abbr title="One DIMM Per Channel">{{{1}}}</abbr><!-- | ||
-->|2dpc=<abbr title="Two DIMMs Per Channel">{{{1}}}</abbr><!-- | -->|2dpc=<abbr title="Two DIMMs Per Channel">{{{1}}}</abbr><!-- | ||
| − | -->|3ds dimm=[[ | + | -->|3ds dimm=[[3ds dimm|<abbr title="3D-Stacked Dual In-line Memory Module">{{{1}}}</abbr>]]<!-- |
| − | -->|3ds rdimm=[[ | + | -->|3ds rdimm=[[3ds dimm|<abbr title="3D-Stacked Registered Dual In-line Memory Module">{{{1}}}</abbr>]]<!-- |
-->|4r=<abbr title="Quad Rank">{{{1}}}</abbr><!-- | -->|4r=<abbr title="Quad Rank">{{{1}}}</abbr><!-- | ||
-->|8r=<abbr title="Eight Rank">{{{1}}}</abbr><!-- | -->|8r=<abbr title="Eight Rank">{{{1}}}</abbr><!-- | ||
| Line 12: | Line 12: | ||
-->|apml=<abbr title="Advanced Platform Management Link">{{{1}}}</abbr><!-- AMD | -->|apml=<abbr title="Advanced Platform Management Link">{{{1}}}</abbr><!-- AMD | ||
-->|apu=<abbr title="Accelerated Processing Unit (processor with integrated graphics)">{{{1}}}</abbr><!-- AMD | -->|apu=<abbr title="Accelerated Processing Unit (processor with integrated graphics)">{{{1}}}</abbr><!-- AMD | ||
| + | -->|ate=[[wikipedia:Automatic test equipment|{{{1}}}]]<!-- | ||
-->|bga=<abbr title="Ball Grid Array">{{{1}}}</abbr><!-- | -->|bga=<abbr title="Ball Grid Array">{{{1}}}</abbr><!-- | ||
-->|bmc=[[wikipedia:Intelligent Platform Management Interface#Baseboard management controller|<abbr title="Baseboard Management Controller">{{{1}}}</abbr>]]<!-- | -->|bmc=[[wikipedia:Intelligent Platform Management Interface#Baseboard management controller|<abbr title="Baseboard Management Controller">{{{1}}}</abbr>]]<!-- | ||
| Line 17: | Line 18: | ||
-->|bsp:ap=<abbr title="Application Processor (cf. Boot Strap Processor which initializes a multiprocessor system)">{{#explode:{{{1}}}|:|1|2}}</abbr><!-- | -->|bsp:ap=<abbr title="Application Processor (cf. Boot Strap Processor which initializes a multiprocessor system)">{{#explode:{{{1}}}|:|1|2}}</abbr><!-- | ||
-->|bt=[[wikipedia:Bluetooth|{{{1}}}]]<!-- | -->|bt=[[wikipedia:Bluetooth|{{{1}}}]]<!-- | ||
| + | -->|c4=<abbr title="Controlled Collapse Chip Connection">{{{1}}}</abbr><!-- | ||
-->|cake=[[amd/infinity fabric|<abbr title="Coherent AMD socKet Extender">{{{1}}}</abbr>]]<!-- AMD | -->|cake=[[amd/infinity fabric|<abbr title="Coherent AMD socKet Extender">{{{1}}}</abbr>]]<!-- AMD | ||
-->|ccix=[[ccix|<abbr title="Cache Coherent Interconnect for accelerators">{{{1}}}</abbr>]]<!-- | -->|ccix=[[ccix|<abbr title="Cache Coherent Interconnect for accelerators">{{{1}}}</abbr>]]<!-- | ||
| Line 22: | Line 24: | ||
-->|ccx=<abbr title="Core Complex">{{{1}}}</abbr><!-- AMD | -->|ccx=<abbr title="Core Complex">{{{1}}}</abbr><!-- AMD | ||
-->|cir=[[wikipedia:Consumer IR|{{{1}}}]]<!-- | -->|cir=[[wikipedia:Consumer IR|{{{1}}}]]<!-- | ||
| + | -->|crc=[[wikipedia:Cyclic redundancy check|{{{1}}}]]<!-- | ||
-->|crt=[[wikipedia:Cathode-ray tube|<abbr title="Cathode-Ray Tube">{{{1}}}</abbr>]]<!-- | -->|crt=[[wikipedia:Cathode-ray tube|<abbr title="Cathode-Ray Tube">{{{1}}}</abbr>]]<!-- | ||
-->|if:cs=[[amd/infinity fabric|<abbr title="Coherent Slave">{{#explode:{{{1}}}|:|1|2}}</abbr>]]<!-- | -->|if:cs=[[amd/infinity fabric|<abbr title="Coherent Slave">{{#explode:{{{1}}}|:|1|2}}</abbr>]]<!-- | ||
| Line 35: | Line 38: | ||
-->|dp=[[wikipedia:DisplayPort|<abbr title="DisplayPort">{{{1}}}</abbr>]]<!-- | -->|dp=[[wikipedia:DisplayPort|<abbr title="DisplayPort">{{{1}}}</abbr>]]<!-- | ||
-->|dr=<abbr title="Dual Rank">{{{1}}}</abbr><!-- | -->|dr=<abbr title="Dual Rank">{{{1}}}</abbr><!-- | ||
| + | -->|dram=<abbr title="Dynamic Random Access Memory">{{{1}}}</abbr><!-- | ||
-->|dsi=[[wikipedia:Display Serial Interface|<abbr title="Display Serial Interface">{{{1}}}</abbr>]]<!-- | -->|dsi=[[wikipedia:Display Serial Interface|<abbr title="Display Serial Interface">{{{1}}}</abbr>]]<!-- | ||
-->|dvi=[[wikipedia:Digital Visual Interface|<abbr title="Digital Visual Interface">{{{1}}}</abbr>]]<!-- | -->|dvi=[[wikipedia:Digital Visual Interface|<abbr title="Digital Visual Interface">{{{1}}}</abbr>]]<!-- | ||
| Line 42: | Line 46: | ||
-->|espi=[[wikipedia:Serial Peripheral Interface#Intel Enhanced Serial Peripheral Interface Bus|<abbr title="Enhanced Serial Peripheral Interface">{{{1}}}</abbr>]]<!-- | -->|espi=[[wikipedia:Serial Peripheral Interface#Intel Enhanced Serial Peripheral Interface Bus|<abbr title="Enhanced Serial Peripheral Interface">{{{1}}}</abbr>]]<!-- | ||
-->|fch=<abbr title="Fusion Controller Hub (chipset)">{{{1}}}</abbr><!-- AMD | -->|fch=<abbr title="Fusion Controller Hub (chipset)">{{{1}}}</abbr><!-- AMD | ||
| + | -->|fsb=[[front side bus|<abbr title="Front Side Bus">{{{1}}}</abbr>]]<!-- | ||
-->|fti=[[amd/infinity fabric|<abbr title="Fabric Transport Interface">{{{1}}}</abbr>]]<!-- AMD | -->|fti=[[amd/infinity fabric|<abbr title="Fabric Transport Interface">{{{1}}}</abbr>]]<!-- AMD | ||
-->|gfx=<abbr title="External graphics card link">{{{1}}}</abbr><!-- AMD | -->|gfx=<abbr title="External graphics card link">{{{1}}}</abbr><!-- AMD | ||
| Line 50: | Line 55: | ||
-->|gpr=<abbr title="General Purpose Register">{{{1}}}</abbr><!-- | -->|gpr=<abbr title="General Purpose Register">{{{1}}}</abbr><!-- | ||
-->|hda=[[wikipedia:Intel High Definition Audio|{{{1}}}]]<!-- | -->|hda=[[wikipedia:Intel High Definition Audio|{{{1}}}]]<!-- | ||
| + | -->|hdcp=[[wikipedia:High-bandwidth Digital Content Protection|{{{1}}}]]<!-- | ||
-->|hdmi=[[wikipedia:HDMI|<abbr title="High-Definition Multimedia Interface">{{{1}}}</abbr>]]<!-- | -->|hdmi=[[wikipedia:HDMI|<abbr title="High-Definition Multimedia Interface">{{{1}}}</abbr>]]<!-- | ||
-->|hedt=<abbr title="High-End Desktop">{{{1}}}</abbr><!-- | -->|hedt=<abbr title="High-End Desktop">{{{1}}}</abbr><!-- | ||
| Line 69: | Line 75: | ||
-->|mdio=[[wikipedia:Management Data Input/Output|{{{1}}}]]<!-- | -->|mdio=[[wikipedia:Management Data Input/Output|{{{1}}}]]<!-- | ||
-->|mmc=[[wikipedia:MultiMediaCard|{{{1}}}]]<!-- | -->|mmc=[[wikipedia:MultiMediaCard|{{{1}}}]]<!-- | ||
| + | -->|msr=<abbr title="Model Specific Register">{{{1}}}</abbr><!-- | ||
| + | -->|mst=[[wikipedia:DisplayPort|<abbr title="Multi-Stream Transport">{{{1}}}</abbr>]]<!-- | ||
-->|nbio=<abbr title="Northbridge I/O unit">{{{1}}}</abbr><!-- | -->|nbio=<abbr title="Northbridge I/O unit">{{{1}}}</abbr><!-- | ||
| + | -->|nda=[[wikipedia:Non-disclosure agreement|{{{1}}}]]<!-- | ||
-->|nmi=<abbr title="Non-Maskable Interrupt">{{{1}}}</abbr><!-- | -->|nmi=<abbr title="Non-Maskable Interrupt">{{{1}}}</abbr><!-- | ||
-->|nvdimm-n=[[wikipedia:NVDIMM|<abbr title="Non-Volatile Dual In-line Memory Module, N type (DRAM with NVM backup on power loss)">{{{1}}}</abbr>]]<!-- | -->|nvdimm-n=[[wikipedia:NVDIMM|<abbr title="Non-Volatile Dual In-line Memory Module, N type (DRAM with NVM backup on power loss)">{{{1}}}</abbr>]]<!-- | ||
| Line 84: | Line 93: | ||
-->|pie=<abbr title="Power management, Interrupts, Etc.">{{{1}}}</abbr><!-- initialism expanded e.g. in AMD-54945 | -->|pie=<abbr title="Power management, Interrupts, Etc.">{{{1}}}</abbr><!-- initialism expanded e.g. in AMD-54945 | ||
-->|psp=[[amd/secure processor|<abbr title="Platform Security Processor">{{{1}}}</abbr>]]<!-- AMD | -->|psp=[[amd/secure processor|<abbr title="Platform Security Processor">{{{1}}}</abbr>]]<!-- AMD | ||
| + | -->|s/pdif=[[wikipedia:S/PDIF|<abbr title="Sony/Philips Digital Interface">{{{1}}}</abbr>]]<!-- | ||
-->|qnan=[[wikipedia:NaN|<abbr title="Quiet Not-a-Number">{{{1}}}</abbr>]]<!-- | -->|qnan=[[wikipedia:NaN|<abbr title="Quiet Not-a-Number">{{{1}}}</abbr>]]<!-- | ||
-->|qspi[[wikipedia:Serial_Peripheral_Interface#Quad_SPI|<abbr title="Quad Serial Peripheral Interface">{{{1}}}</abbr>]]<!-- | -->|qspi[[wikipedia:Serial_Peripheral_Interface#Quad_SPI|<abbr title="Quad Serial Peripheral Interface">{{{1}}}</abbr>]]<!-- | ||
| Line 90: | Line 100: | ||
-->|sata=[[wikipedia:Serial ATA|{{{1}}}]]<!-- | -->|sata=[[wikipedia:Serial ATA|{{{1}}}]]<!-- | ||
-->|sb-rmi=<abbr title="Sideband Remote Management Interface">{{{1}}}</abbr><!-- AMD | -->|sb-rmi=<abbr title="Sideband Remote Management Interface">{{{1}}}</abbr><!-- AMD | ||
| − | -->|sb-tsi=<abbr title="Sideband Temperature Sensor Interface">{{{1}}}</abbr><!-- AMD | + | -->|sb-tsi=[[amd/sb-tsi|<abbr title="Sideband Temperature Sensor Interface">{{{1}}}</abbr>]]<!-- AMD |
-->|sbi=<abbr title="Sideband Interface">{{{1}}}</abbr><!-- AMD | -->|sbi=<abbr title="Sideband Interface">{{{1}}}</abbr><!-- AMD | ||
-->|sd=[[wikipedia:SD card|<abbr title="Secure Digital card">{{{1}}}</abbr>]]<!-- | -->|sd=[[wikipedia:SD card|<abbr title="Secure Digital card">{{{1}}}</abbr>]]<!-- | ||
| Line 108: | Line 118: | ||
-->|smrom=<abbr title="Synchronous Mask Read-Only Memory">{{{1}}}</abbr><!-- | -->|smrom=<abbr title="Synchronous Mask Read-Only Memory">{{{1}}}</abbr><!-- | ||
-->|smt=[[wikipedia:Surface-mount technology|{{{1}}}]]<!-- | -->|smt=[[wikipedia:Surface-mount technology|{{{1}}}]]<!-- | ||
| − | -->|smu=<abbr title="System Management Unit">{{{1}}}</abbr><!-- AMD | + | -->|smu=[[amd/system management unit|<abbr title="System Management Unit">{{{1}}}</abbr>]]<!-- AMD |
-->|snan=[[wikipedia:NaN|<abbr title="Signaling Not-a-Number">{{{1}}}</abbr>]]<!-- | -->|snan=[[wikipedia:NaN|<abbr title="Signaling Not-a-Number">{{{1}}}</abbr>]]<!-- | ||
-->|soc=<abbr title="System on a Chip">{{{1}}}</abbr><!-- | -->|soc=<abbr title="System on a Chip">{{{1}}}</abbr><!-- | ||
Latest revision as of 01:43, 17 May 2023
This template is a wrapper around the HTML <abbr> tag similar to https://en.wikipedia.org/wiki/Template:Abbr and it knows a few common abbreviations to save typing.
| Test | |
|---|---|
| {{abbr|WMF|Wikimedia Foundation}} | WMF |
| [[meta:Wikimedia Foundation|{{abbr|WMF|Wikimedia Foundation}}]] | WMF |
| {{abbr|WMF}} | WMF |
| x{{abbr| SMROM }}x | x SMROM x |
| {{abbr|I2C}}, {{abbr|I²c}}, {{abbr|i<sup>2</sup>C}} | I2C, I²c, i2C |
| {{abbr|xGMI}} | xGMI |
| {{abbr|SFH}} | SFH |
| {{abbr|RDIMM}}s | RDIMMs |