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Difference between revisions of "marvell/thunderx3"
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| manufacturer      = TSMC
 
| manufacturer      = TSMC
 
| type              = Microprocessors
 
| type              = Microprocessors
| first announced  = 2019
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| first announced  = 2020
 
| first launched    =  
 
| first launched    =  
 
| isa              = ARMv8.2
 
| isa              = ARMv8.2
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| microarch 2      =  
 
| microarch 2      =  
 
| word              = 64 bit
 
| word              = 64 bit
| proc              =  
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| proc              = 7nm FFN TSMC
 
| proc 2            =  
 
| proc 2            =  
 
| tech              = CMOS
 
| tech              = CMOS
| tech 2            = 7nm FFN TSMC
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| tech 2            =
 
| clock min        =  
 
| clock min        =  
 
| clock max        =  
 
| clock max        =  

Latest revision as of 21:39, 17 November 2019

ThunderX3
ThunderX3
Developer Marvell
Manufacturer TSMC
Type Microprocessors
Introduction 2020 (announced)
ISA ARMv8.2
µarch Triton
Word size 64 bit
8 octets
16 nibbles
Process 7nm FFN TSMC
"nmFFNTSMC" is not declared as a valid unit of measurement for this property.
Technology CMOS
Succession
ThunderX2

ThunderX3 is a family of 64-bit multi-core ARM server microprocessors planned by Marvell, succeeding the ThunderX2 line originally released by Cavium, now acquired by Marvell.

Overview[edit]

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Facts about "ThunderX3 - Marvell"
designerMarvell +
first announced2020 +
full page namemarvell/thunderx3 +
instance ofmicroprocessor family +
instruction set architectureARMv8.2 +
main designerMarvell +
manufacturerTSMC +
microarchitectureTriton +
nameThunderX3 +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +