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− | {{intel title|Innovation Engine}} | + | {{intel title|Innovation Engine}}[[File:intel lewisburg pch ie.png|right|200px]] |
− | '''Innovation Engine''' ('''IE''') is a tiny [[microcontroller]] [[coprocessor]] integrated within [[Intel]]'s server chipsets that provides the framework necessary for system designers to create their own highly customized firmware. From an architectural standpoint, IE is very similar to Intel's {{intel|Management Engine}} (ME), but is designed as an "open engine", allowing system designers to develop their own differentiating firmware. | + | '''Innovation Engine''' ('''IE''') is a tiny [[microcontroller]] [[coprocessor]] integrated within [[Intel]]'s server chipsets that provides the framework necessary for system designers to create their own highly customized firmware. From an architectural standpoint, IE is very similar to Intel's {{intel|Management Engine}} (ME), but is designed as an "open engine", allowing system designers to develop their own differentiating [[firmware]]. IE complements ME and are both present starting with the introduction of the Lewisburg [[chipset]]. |
+ | |||
+ | == Overview == | ||
+ | Intel introduced Innovation Engine (IE) starting with the {{intel|Lewisburg|l=chipset}} [[chipset]] (i.e., {{intel|Skylake-SP|l=core}} parts). IE is integrated along with {{intel|Management Engine|ME}} into the chipset. Whereas ME is designed specifically for Intel's features, IE is designed specifically for system designers. That is, Intel only provides the hardware to operate IE but unless the system designers develop specific firmware for it, it does not do anything. | ||
+ | |||
+ | :[[File:intel ie 1.0 diagram.png|500px]] | ||
+ | |||
+ | Like Intel's ME, IE runs on a {{arch|32}} [[x86]] {{intel|Quark}} microcontroller. IE runs cryptographically signed "IE code" only, bound to the system-builder. Unauthenticated code will not load. Unlike ME, IE has additional access to UART. | ||
+ | |||
+ | {| class="wikitable" | ||
+ | ! colspan="3" | {{intel|Lewisburg|l=chipset}} ME vs IE Features | ||
+ | |- | ||
+ | | Processor || Intel® Quark™ x86 (412 DMIPS) || Intel Quark x86 (412 DMIPS) | ||
+ | |- | ||
+ | | Memory || 1.7 MiB SRAM || 1.4 MiB SRAM | ||
+ | |- | ||
+ | | Crypto Algorithms || {{tchk|yes}} || {{tchk|yes}} | ||
+ | |- | ||
+ | | Host Interface || {{tchk|yes}} || {{tchk|yes}} | ||
+ | |- | ||
+ | | Platform Interface || {{tchk|yes}} || {{tchk|yes|Yes + UART}} | ||
+ | |- | ||
+ | | FW || Intel® AMT/vPro, SPS || System Builder FW | ||
+ | |- | ||
+ | | Security || TXT, BtG, PTT, KPT || - | ||
+ | |- | ||
+ | | Operating States || S0/M0, Sx/M3, Sx-Moff || S0/I0, Sx/I3, '''S0/Ioff''', Sx/Ioff | ||
+ | |} | ||
+ | |||
+ | == See also == | ||
+ | * {{intel|Management Engine}} (ME) | ||
+ | |||
+ | [[category:intel]] |
Revision as of 03:41, 1 January 2018
Innovation Engine (IE) is a tiny microcontroller coprocessor integrated within Intel's server chipsets that provides the framework necessary for system designers to create their own highly customized firmware. From an architectural standpoint, IE is very similar to Intel's Management Engine (ME), but is designed as an "open engine", allowing system designers to develop their own differentiating firmware. IE complements ME and are both present starting with the introduction of the Lewisburg chipset.
Overview
Intel introduced Innovation Engine (IE) starting with the Lewisburg chipset (i.e., Skylake-SP parts). IE is integrated along with ME into the chipset. Whereas ME is designed specifically for Intel's features, IE is designed specifically for system designers. That is, Intel only provides the hardware to operate IE but unless the system designers develop specific firmware for it, it does not do anything.
Like Intel's ME, IE runs on a 32-bit x86 Quark microcontroller. IE runs cryptographically signed "IE code" only, bound to the system-builder. Unauthenticated code will not load. Unlike ME, IE has additional access to UART.
Lewisburg ME vs IE Features | ||
---|---|---|
Processor | Intel® Quark™ x86 (412 DMIPS) | Intel Quark x86 (412 DMIPS) |
Memory | 1.7 MiB SRAM | 1.4 MiB SRAM |
Crypto Algorithms | ✔ | ✔ |
Host Interface | ✔ | ✔ |
Platform Interface | ✔ | Yes + UART |
FW | Intel® AMT/vPro, SPS | System Builder FW |
Security | TXT, BtG, PTT, KPT | - |
Operating States | S0/M0, Sx/M3, Sx-Moff | S0/I0, Sx/I3, S0/Ioff, Sx/Ioff |
See also
- Management Engine (ME)