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Difference between revisions of "intel/core i3/6120t"
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{{intel title|Core i3-6120T}}
 
{{intel title|Core i3-6120T}}
−
{{mpu
+
{{chip
−
| name               = Intel Core i3-6120T
+
|name=Core i3-6120T
−
| no image           = Yes
+
|no image=Yes
−
| image               =
+
|image=skylake (fclga1151).png
−
| image size          =
+
|designer=Intel
−
| caption            =  
+
|manufacturer=Intel
−
| designer           = Intel
+
|model number=i3-6120T
−
| manufacturer       = Intel
+
|part number=CM8066201927104
−
| model number       = i3-6120T
+
|s-spec=SR2HF
−
| part number         = CM8066201927104
+
|market=Desktop
−
| part number 1      =  
+
|first announced=May 9, 2016
−
| part number 2      =  
+
|family=Core i3
−
| part number 3       =  
+
|series=i3-6000
−
| part number 4       =  
+
|locked=Yes
−
| market              = Desktop
+
|bus type=DMI 3.0
−
| first announced    = May 9, 2016
+
|bus links=4
−
| first launched      = June 3, 2016
+
|bus rate=8 GT/s
−
| last order          =  
+
|isa=x86-64
−
| last shipment      =  
+
|isa family=x86
 +
|microarch=Skylake
 +
|chipset=Sunrise Point
 +
|core name=Skylake S
 +
|core family=6
 +
|core model=94
 +
|core stepping=S0
 +
|process=14 nm
 +
|technology=CMOS
 +
|die area=98.57 mm²
 +
|die length=10.3 mm
 +
|die width=9.57 mm
 +
|word size=64 bit
 +
|core count=2
 +
|thread count=4
 +
|max cpus=1
 +
|max memory=64 GiB
 +
|v core min=0.55 V
 +
|v core max=1.52 V
 +
|tdp=35 W
 +
|tjunc min=0 °C
 +
|tjunc max=100 °C
 +
|tstorage min=-25 °C
 +
|tstorage max=125 °C
 +
|package module 1={{packages/intel/fclga-1151}}
 +
}}
 +
'''Core i3-6120T''' is a [[dual-core]] {{arch|64}} [[x86]] entry-level performance desktop microprocessor announced by [[Intel]] in early 2016. This processor, which is based on the {{intel|Skylake|l=arch}} microarchitecture and is fabricated on a [[14 nm process]], has a base frequency of ? GHz with a TDP of 35 W. The i3-6120T incorporates the {{intel|HD Graphics 530}} [[IGP]] operating at 350 MHz and a turbo frequency of 950 MHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  
−
| family            = Core i3
+
It's unknown if this processor was ever released.
−
| series            = 6100
 
−
| locked            = Yes
 
−
| frequency          =
 
−
| turbo frequency    =
 
−
| turbo frequency1  =
 
−
| turbo frequency2  =
 
−
| turbo frequency3  =
 
−
| turbo frequency4  =
 
−
| bus type          = DMI 3.0
 
−
| bus speed          =
 
−
| bus rate          = 8 GT/s
 
−
| clock multiplier  =
 
−
| s-spec            = SR2HF
 
  
−
| microarch          = Skylake
+
{{unknown features}}
−
| platform          =
 
−
| core name          =
 
−
| core stepping      =
 
−
| process            = 14 nm
 
−
| die size          =
 
−
| word size          = 64 bits
 
−
| core count        = 2
 
−
| thread count      = 4
 
−
| max cpus          = 1
 
−
| max memory        = 64 GB
 
−
 
 
−
| electrical          =
 
−
| sdp                =
 
−
| tdp                =
 
−
| ctdp down          =
 
−
| ctdp down frequency =
 
−
| ctdp up            =
 
−
| ctdp up frequency  =
 
−
| temp max            =
 
−
| temp min            =
 
  
−
| packaging          =
 
−
| package            =
 
−
| package type        =
 
−
| package pitch      =
 
−
| package size        =
 
−
| socket              =
 
−
}}
 
−
'''Core i3-6120T''' is a {{arch|64}} [[dual-core]] low-end performance [[microprocessor]] set to be introduced by [[Intel]] in 2016.
 
−
<br><br><br><br>
 
−
{{unknown features}}
 
  
 
== Cache ==
 
== Cache ==
 
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
−
{{cache info
+
{{cache size
−
|l1i cache=64 KB
+
|l1 cache=128 KiB
−
|l1i break=2x32 KB
+
|l1i cache=64 KiB
 +
|l1i break=2x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
−
|l1i extra=(per core, write-back)
+
|l1d cache=64 KiB
−
|l1d cache=64 KB
+
|l1d break=2x32 KiB
−
|l1d break=2x32 KB
 
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
−
|l1d extra=(per core, write-back)
+
|l1d policy=write-back
−
|l2 cache=512 KB
+
|l2 cache=512 KiB
−
|l2 break=2x256 KB
+
|l2 break=2x256 KiB
 
|l2 desc=4-way set associative
 
|l2 desc=4-way set associative
−
|l2 extra=(per core, write-back)
+
|l2 policy=write-back
−
|l3 cache=3 MB
+
|l3 cache=3 MiB
−
|l3 desc=shared
+
|l3 break=2x1.5 MiB
 +
|l3 policy=write-back
 +
}}
 +
 
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR3L-1600
 +
|type 2=DDR4-2133
 +
|ecc=Yes
 +
|max mem=64 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=31.79 GiB/s
 +
|bandwidth schan=15.89 GiB/s
 +
|bandwidth dchan=31.79 GiB/s
 
}}
 
}}
  
 
== Expansions ==
 
== Expansions ==
−
{{mpu expansions
+
{{expansions
 
| pcie revision      = 3.0
 
| pcie revision      = 3.0
 
| pcie lanes        = 16
 
| pcie lanes        = 16
 
| pcie config        = 1x16
 
| pcie config        = 1x16
−
| pcie config 1     = 2x8
+
| pcie config 2     = 2x8
−
| pcie config 2     = 1x8+2x4
+
| pcie config 3     = 1x8+2x4
−
| usb revision      =
 
−
| usb revision 2    =
 
−
| usb ports          =
 
−
| sata ports        =
 
−
| integrated lan    =
 
−
| uart              =
 
−
| gp io              =
 
 
}}
 
}}
  
−
== Features ==  
+
== Graphics ==
−
{{mpu features
+
{{integrated graphics
−
| em64t       = Yes
+
| gpu                = HD Graphics 530
−
| nx         = Yes
+
| device id          = 0x1912
−
| txt        =  
+
| designer            = Intel
−
| tsx         =  
+
| execution units    = 24
−
| vpro        =  
+
| max displays        = 3
−
| ht         = Yes
+
| max memory          = 64 GiB
−
| tbt1       =
+
| frequency          = 350 MHz
−
| tbt2       =  
+
| max frequency       = 950 MHz
−
| bpt        =  
+
 
−
| vt-x       = Yes
+
| output crt          =
−
| vt-d       = Yes
+
| output sdvo        =
−
| ept        = Yes
+
| output dsi          =
−
| mmx         = Yes
+
| output edp         = Yes
−
| sse         = Yes
+
| output dp          = Yes
−
| sse2       = Yes
+
| output hdmi         = Yes
−
| sse3       = Yes
+
| output vga          =  
−
| ssse3       = Yes
+
| output dvi         = Yes
−
| sse4        = Yes
+
 
−
| sse4.1      = Yes
+
| directx ver       = 12
−
| sse4.2      = Yes
+
| opengl ver        = 4.4
−
| aes         = Yes
+
| opencl ver        = 2.0
−
| pclmul      = Yes
+
| hdmi ver          = 1.4a
−
| avx        = Yes
+
| dp ver            = 1.2
−
| avx2        = Yes
+
| edp ver            = 1.3
−
| bmi        = Yes
+
| max res hdmi      = 4096x2304
−
| bmi1        = Yes
+
| max res hdmi freq  = 24 Hz
−
| bmi2        = Yes
+
| max res dp        = 4096x2304
−
| f16c        = Yes
+
| max res dp freq    = 60 Hz
−
| fma3        = Yes
+
| max res edp       = 4096x2304
−
| mpx         = Yes
+
| max res edp freq  = 60 Hz
−
| sgx         = Yes
+
| max res vga       =
−
| eist        = Yes
+
| max res vga freq  =
−
| secure key  = Yes
+
 
−
| os guard    = Yes
+
| features            = Yes
−
| intel at    =  
+
| intel quick sync    = Yes
 +
| intel intru 3d      = Yes
 +
| intel insider       =
 +
| intel widi          =
 +
| intel fdi            =
 +
| intel clear video    = Yes
 +
| intel clear video hd = Yes
 +
}}
 +
{{skylake hardware accelerated video table|col=1}}
 +
 
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=Yes
 +
|avx2=Yes
 +
 
 +
|abm=Yes
 +
|tbm=No
 +
|bmi1=Yes
 +
|bmi2=Yes
 +
|fma3=Yes
 +
|fma4=No
 +
|aes=Yes
 +
|rdrand=Yes
 +
|sha=No
 +
|xop=No
 +
|adx=Yes
 +
|clmul=Yes
 +
|f16c=Yes
 +
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=Yes
 +
|tsx=No
 +
|txt=No
 +
|ht=Yes
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=Yes
 +
|sgx=Yes
 +
|securekey=Yes
 +
|osguard=Yes
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 
}}
 
}}

Latest revision as of 15:16, 13 December 2017

Edit Values
Core i3-6120T
skylake (fclga1151).png
General Info
DesignerIntel
ManufacturerIntel
Model Numberi3-6120T
Part NumberCM8066201927104
S-SpecSR2HF
MarketDesktop
IntroductionMay 9, 2016 (announced)
ShopAmazon
General Specs
FamilyCore i3
Seriesi3-6000
LockedYes
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake
ChipsetSunrise Point
Core NameSkylake S
Core Family6
Core Model94
Core SteppingS0
Process14 nm
TechnologyCMOS
Die98.57 mm²
10.3 mm × 9.57 mm
Word Size64 bit
Cores2
Threads4
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.55 V-1.52 V
TDP35 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCLGA-1151 (LGA)
FC-LGA14C		FCLGA-1151.svg
Dimension37.5 mm x 37.5 mm x 4.4 mm
Pitch0.914 mm
Contacts1151
SocketLGA-1151

Core i3-6120T is a dual-core 64-bit x86 entry-level performance desktop microprocessor announced by Intel in early 2016. This processor, which is based on the Skylake microarchitecture and is fabricated on a 14 nm process, has a base frequency of ? GHz with a TDP of 35 W. The i3-6120T incorporates the HD Graphics 530 IGP operating at 350 MHz and a turbo frequency of 950 MHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.

It's unknown if this processor was ever released.

DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB4-way set associativewrite-back
L3$3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
  2x1.5 MiB write-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1600, DDR4-2133
Supports ECCYes
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes16
Configs1x16, 2x8, 1x8+2x4


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics 530
DesignerIntelDevice ID0x1912
Execution Units24Max Displays3
Max Memory64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
Frequency350 MHz
0.35 GHz
350,000 KHz
Burst Frequency950 MHz
0.95 GHz
950,000 KHz
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4096x2304 @24 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz
Standards
DirectX12
OpenGL4.4
OpenCL2.0
DP1.2
eDP1.3
HDMI1.4a
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
EISTEnhanced SpeedStep Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
IPTIdentity Protection Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i3/6120t&oldid=70501"
Facts about "Core i3-6120T - Intel"
RDF feed
l1d$ description8-way set associative +
l1i$ description8-way set associative +
l2$ description4-way set associative +
l3$ descriptionshared +
l3$ size3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +