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Difference between revisions of "intel/xeon e5/e5-2687w v4"
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{{intel title|Xeon E5-2687W v4}}
 
{{intel title|Xeon E5-2687W v4}}
 
{{mpu
 
{{mpu
−
| name               = Xeon E5-2687W v4
+
|name=Xeon E5-2687W v4
−
| no image           = Yes
+
|no image=Yes
−
| image              =
+
|designer=Intel
−
| image size          =
+
|manufacturer=Intel
−
| caption            =
+
|model number=E5-2687W v4
−
| designer           = Intel
+
|part number=CM8066002042802
−
| manufacturer       = Intel
+
|part number 2=BX80660E52687V4
−
| model number       = E5-2687W v4
+
|s-spec=SR2NA
−
| part number         = CM8066002042802
+
|s-spec qs=QK99
−
| part number 2       = BX80660E52687V4
+
|market=Server
−
| part number 3      =  
+
|first announced=June 20, 2016
−
| part number 4      =  
+
|first launched=June 20, 2016
−
| market             = Server
+
|release price=$2141.00
−
| first announced     = June 20, 2016
+
|family=Xeon E5
−
| first launched     = June 20, 2016
+
|series=E5-2600
−
| last order          =
+
|locked=Yes
−
| last shipment      =
+
|frequency=3,000 MHz
−
| release price       = $2141.00
+
|turbo frequency1=3,500 MHz
−
 
+
|turbo frequency2=3,500 MHz
−
| family             = Xeon E5
+
|turbo frequency3=3,300 MHz
−
| series             = E5-2000
+
|turbo frequency4=3,200 MHz
−
| locked             = Yes
+
|turbo frequency5=3,200 MHz
−
| frequency           = 3,000 MHz
+
|turbo frequency6=3,200 MHz
−
| turbo frequency    = Yes
+
|turbo frequency7=3,200 MHz
−
| turbo frequency1   = 3,500 MHz
+
|turbo frequency8=3,200 MHz
−
| turbo frequency2   = 3,500 MHz
+
|turbo frequency9=3,200 MHz
−
| turbo frequency3   = 3,300 MHz
+
|turbo frequency10=3,200 MHz
−
| turbo frequency4   = 3,200 MHz
+
|turbo frequency11=3,200 MHz
−
| turbo frequency5   = 3,200 MHz
+
|turbo frequency12=3,200 MHz
−
| turbo frequency6   = 3,200 MHz
+
|bus type=QPI
−
| turbo frequency7   = 3,200 MHz
+
|bus speed=4,800 MHz
−
| turbo frequency8   = 3,200 MHz
+
|bus links=2
−
| turbo frequency9   = 3,200 MHz
+
|bus rate=9.6 GT/s
−
| turbo frequency10   = 3,200 MHz
+
|clock multiplier=30
−
| turbo frequency11   = 3,200 MHz
+
|cpuid=406F1
−
| turbo frequency12   = 3,200 MHz
+
|isa=x86-64
−
| bus type           = QPI
+
|isa family=x86
−
| bus speed           = 4,800 MHz
+
|microarch=Broadwell
−
| bus rate           = 9.6 GT/s
+
|platform=Grantley EP 2S
−
| bus links          = 2
+
|chipset=C610 Series
−
| clock multiplier   = 30
+
|core name=Broadwell EP
−
| s-spec              = SR2NA
+
|core family=6
−
| s-spec es          =
+
|core model=4F
−
| s-spec qs          = QK99
+
|core stepping=M0
−
| cpuid               = 406F1
+
|process=14 nm
−
 
+
|transistors=4,700,000,000
−
| isa family          = x86
+
|technology=CMOS
−
| isa                 = x86-64
+
|word size=64 bit
−
| microarch           = Broadwell
+
|core count=12
−
| platform           = Grantley EP 2S
+
|thread count=24
−
| chipset             = C610 Series
+
|max cpus=2
−
| core name           = Broadwell EP
+
|max memory=1,536 GiB
−
| core family         = 6
+
|v core=1.82 V
−
| core model         = 4F
+
|v io=1.2 V
−
| core stepping       = M0
+
|v io tolerance=3%
−
| process             = 14 nm
+
|tdp=160 W
−
| transistors         = 4,700,000,000
+
|tcase min=0 °C
−
| technology         = CMOS
+
|tcase max=76 °C
−
| die size            = 306.18 mm²
+
|tstorage min=-25 °C
−
| word size           = 64 bit
+
|tstorage max=125 °C
−
| core count         = 12
+
|turbo frequency=Yes
−
| thread count       = 24
+
|die size=306.18 mm²
−
| max cpus           = 2
+
|packaging=Yes
−
| max memory         = 1,536 GiB
+
|package 0=FCLGA-2011-v3
−
 
+
|package 0 type=FCLGA
−
 
+
|package 0 pins=2011
−
| v core             = 1.82 V
+
|package 0 pitch=0.8814 mm
−
| v core tolerance    =
+
|package 0 width=52.5 mm
−
| v io               = 1.2 V
+
|package 0 length=45.0 mm
−
| v io tolerance     = 3%
+
|package 0 height=5.316 mm
−
| sdp                =
+
|socket 0=LGA-2011-v3
−
| tdp                 = 160 W
+
|socket 0 type=LGA
−
| ctdp down          =
 
−
| ctdp down frequency =
 
−
| ctdp up            =
 
−
| ctdp up frequency  =
 
−
| tjunc min          =
 
−
| tjunc max          =
 
−
| tcase min           = 0 °C
 
−
| tcase max           = 76 °C
 
−
| tstorage min       = -25 °C
 
−
| tstorage max       = 125 °C
 
−
 
 
−
| packaging           = Yes
 
−
| package 0           = FCLGA-2011-v3
 
−
| package 0 type     = FCLGA
 
−
| package 0 pins     = 2011
 
−
| package 0 pitch     = 0.8814 mm
 
−
| package 0 width     = 52.5 mm
 
−
| package 0 length   = 45.0 mm
 
−
| package 0 height   = 5.316 mm
 
−
| socket 0           = LGA-2011-v3
 
−
| socket 0 type       = LGA
 
 
}}
 
}}
 
The '''Xeon E5-2687W v4''' is a {{arch|64}} [[dodeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 2S workstation environments. Operating at 3 GHz with a {{intel|turbo boost}} frequency of 3.5 GHz for a single active core, this MPU has a TDP of 160 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).
 
The '''Xeon E5-2687W v4''' is a {{arch|64}} [[dodeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 2S workstation environments. Operating at 3 GHz with a {{intel|turbo boost}} frequency of 3.5 GHz for a single active core, this MPU has a TDP of 160 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).

Revision as of 22:03, 26 July 2017

Template:mpu The Xeon E5-2687W v4 is a 64-bit dodeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for 2S workstation environments. Operating at 3 GHz with a turbo boost frequency of 3.5 GHz for a single active core, this MPU has a TDP of 160 W and is manufactured on a 14 nm process (based on Broadwell).

Cache

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 384 KiB
393,216 B
0.375 MiB
12x32 KiB 8-way set associative (per core, write-back)
L1D$ 384 KiB
393,216 B
0.375 MiB
12x32 KiB 8-way set associative (per core, write-back)
L2$ 3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
12x256 KiB 8-way set associative (per core, write-back)
L3$ 30 MiB
30,720 KiB
31,457,280 B
0.0293 GiB
12x2.5 MiB 20-way set associative (shared, per core, write-back)

Graphics

This microprocessor has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR4-2400
Controllers 1
Channels 4
ECC Support Yes
Max bandwidth 71.53 GiB/s
Bandwidth (single) 17.88 GiB/s
Bandwidth (dual) 35.76 GiB/s
Max memory 1,536 GiB
Physical Address Extensions 46 bit

Expansions

Template:mpu expansions

Features

Template:mpu features

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Facts about "Xeon E5-2687W v4 - Intel"
RDF feed
l1d$ description8-way set associative +
l1d$ size384 KiB (393,216 B, 0.375 MiB) +
l1i$ description8-way set associative +
l1i$ size384 KiB (393,216 B, 0.375 MiB) +
l2$ description8-way set associative +
l2$ size3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
l3$ description20-way set associative +
l3$ size30 MiB (30,720 KiB, 31,457,280 B, 0.0293 GiB) +