Semiconductor & Computer Engineering
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== Implementation restrictions == | == Implementation restrictions == | ||
[[File:MIPS32 add and addi instructions.svg|thumb|right|300px|An encoding comparision between the [[MIPS32]] ADD and ADD Immediate instructions. The immediate value is limited to the 0x00-0xFFFF range.]] | [[File:MIPS32 add and addi instructions.svg|thumb|right|300px|An encoding comparision between the [[MIPS32]] ADD and ADD Immediate instructions. The immediate value is limited to the 0x00-0xFFFF range.]] | ||
| − | Because the immediate value is packed into the instruction itself certain [[ISA]]s have a restricted range of values that can be used as an immediate value. For example in [[MIPS32]], an immediate value is limited to 16-bits. On some more complex architectures such as [[ARM]], some instructions may accept a 16-bit value, others might accepted a smaller range with a the ability to rotate the bits as desired (see | + | Because the immediate value is packed into the instruction itself certain [[ISA]]s have a restricted range of values that can be used as an immediate value. For example in [[MIPS32]], an immediate value is limited to 16-bits. On some more complex architectures such as [[ARM]], some instructions may accept a 16-bit value, others might accepted a smaller range with a the ability to rotate the bits as desired (see {{ARM|LSL}}). |
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| + | In situations where the immediate value cannot be encoded directly into the instruction, such as when the value is out of range, various other ways of working with such values are possible. One such option is to load common values from a constant pool in memory (e.g. a [[literal pool]]). Alternatively values can be assembled using values that can be represented or loaded into a register and operated from there. Some [[ISA]]s such as [[MIPS32]] and [[ARM]] have dedicated instructions such as {{MIPS32|LUI}}, {{ARM|MOVW}}, and {{ARM|MOVT}} which provides a way to load the upper 16-bits followed by the lower 16-bits into a single register. | ||
[[Category:microprocessor architecture]] | [[Category:microprocessor architecture]] | ||
[[Category:Instruction set architecture]] | [[Category:Instruction set architecture]] | ||
Revision as of 01:25, 20 July 2014
An immediate value (or simply an immediate or imm) is a piece of data that is stored as part of the instruction itself instead of being in a memory location or a register. Immediate values are typically used in instructions that load a value or performs an arithmetic or a logical operation on a constant.
Overview
Under most instruction set architectures, various instructions can also perform operation on constant values. For example consider an ISA that can add two registers and store the result in a third register:
add r3, r2, r1 ; r3 = r2 + r1
The instruction set may also support the common case of adding a constant value (such as in the case of many programming languages that support ++var).
add r1, r1, 1 ; r1 = r1 + 1
In the code above, the value 1 is an immediate value that gets encoded in the add instruction itself.
Implementation restrictions
Because the immediate value is packed into the instruction itself certain ISAs have a restricted range of values that can be used as an immediate value. For example in MIPS32, an immediate value is limited to 16-bits. On some more complex architectures such as ARM, some instructions may accept a 16-bit value, others might accepted a smaller range with a the ability to rotate the bits as desired (see LSL).
In situations where the immediate value cannot be encoded directly into the instruction, such as when the value is out of range, various other ways of working with such values are possible. One such option is to load common values from a constant pool in memory (e.g. a literal pool). Alternatively values can be assembled using values that can be represented or loaded into a register and operated from there. Some ISAs such as MIPS32 and ARM have dedicated instructions such as LUI, MOVW, and MOVT which provides a way to load the upper 16-bits followed by the lower 16-bits into a single register.