Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "intel/pentium (2009)/g4400te"
| Line 77: | Line 77: | ||
== Memory controller == | == Memory controller == | ||
{{memory controller | {{memory controller | ||
| − | |type=DDR3L-1600 | + | |type=DDR3L-1600 |
|type 2=DDR4-2133 | |type 2=DDR4-2133 | ||
|ecc=Yes | |ecc=Yes | ||
| Line 84: | Line 84: | ||
|channels=2 | |channels=2 | ||
|max bandwidth=31.79 GiB/s | |max bandwidth=31.79 GiB/s | ||
| − | |bandwidth schan=15. | + | |bandwidth schan=15.89 GiB/s |
|bandwidth dchan=31.79 GiB/s | |bandwidth dchan=31.79 GiB/s | ||
}} | }} | ||
| Line 143: | Line 143: | ||
{{skylake hardware accelerated video table|col=1}} | {{skylake hardware accelerated video table|col=1}} | ||
| − | == Features == | + | == Features == |
{{x86 features | {{x86 features | ||
|real=Yes | |real=Yes | ||
| Line 162: | Line 162: | ||
|sse42=Yes | |sse42=Yes | ||
|sse4a=No | |sse4a=No | ||
| − | |avx= | + | |avx=Yes |
| − | |avx2= | + | |avx2=Yes |
|avx512=No | |avx512=No | ||
|abm=Yes | |abm=Yes | ||
| Line 169: | Line 169: | ||
|bmi1=Yes | |bmi1=Yes | ||
|bmi2=Yes | |bmi2=Yes | ||
| − | |fma3= | + | |fma3=Yes |
|fma4=No | |fma4=No | ||
|aes=Yes | |aes=Yes | ||
| Line 191: | Line 191: | ||
|sipp=No | |sipp=No | ||
|att=No | |att=No | ||
| − | |ipt= | + | |ipt=No |
|tsx=No | |tsx=No | ||
|txt=No | |txt=No | ||
| Line 209: | Line 209: | ||
|amdvi=No | |amdvi=No | ||
|amdv=No | |amdv=No | ||
| + | |amdsme=No | ||
| + | |amdtsme=No | ||
| + | |amdsev=No | ||
|rvi=No | |rvi=No | ||
|smt=No | |smt=No | ||
Revision as of 15:22, 8 July 2017
Template:mpu Pentium G4400TE is a dual-core budget 64-bit x86 microprocessor introduced by Intel in late 2015. This processor, which is based on the Skylake microarchitecture, is fabricated on Intel's 14 nm process and operates at 2.4 GHz with a TDP of 35 W. The G4400TE incorporates the HD Graphics 510 IGP operating at up to 950 MHz and supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
Cache
- Main article: Skylake § Cache
 |
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
||||||||||||||||||||||||||||||||||||
|
|||||||||||||||||||||||||||||||||||||
Memory controller
 |
Integrated Memory Controller
|
|||||||||||||
|
||||||||||||||
Expansions
 |
Expansion Options
|
|||||||
|
||||||||
Graphics
 |
Integrated Graphics Information
|
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| [Edit] Skylake (Gen9) Hardware Accelerated Video Capabilities | |||||||
|---|---|---|---|---|---|---|---|
| Codec | Encode | Decode | |||||
| Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
| MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
| MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, SHP, MHP | 5.1 | 2160p (4K) | |
| JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
| HEVC (H.265) | Main | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
| VC-1 | ✘ | Advanced, Main, Simple | 3, High | 3840x3840 | |||
| VP8 | Unified | Unified | - | 0 | Unified | 1080p | |
| VP9 | ✘ | 0 | Unified | 2160p (4K) | |||
Features
[Edit/Modify Supported Features]
 |
Supported x86 Extensions & Processor Features
|
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Facts about "Pentium G4400TE - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Pentium G4400TE - Intel#io + |
| device id | 0x1902 + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has ecc memory support | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Software Guard Extensions + and Secure Key Technology + |
| has intel enhanced speedstep technology | true + |
| has intel secure key technology | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has second level address translation support | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| integrated gpu | HD Graphics 510 + |
| integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + |
| integrated gpu designer | Intel + |
| integrated gpu execution units | 12 + |
| integrated gpu max frequency | 950 MHz (0.95 GHz, 950,000 KHz) + |
| integrated gpu max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) + |
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
| l3$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
| max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
| max memory channels | 2 + |
| max pcie lanes | 16 + |
| supported memory type | DDR3L-1600 + and DDR4-2133 + |
| x86/has software guard extensions | true + |