From WikiChip
Difference between revisions of "intel/core i7/i7-6700hq"
< intel‎ | core i7

Line 84: Line 84:
 
|bandwidth dchan=31.79 GiB/s
 
|bandwidth dchan=31.79 GiB/s
 
}}
 
}}
 +
 +
== Graphics ==
 +
{{integrated graphics
 +
| gpu                = HD Graphics 530
 +
| device id          = 0x191B
 +
| designer            = Intel
 +
| execution units    = 24
 +
| max displays        = 3
 +
| max memory          = 64 GiB
 +
| frequency          = 350 MHz
 +
| max frequency      = 1,050 MHz
 +
 +
| output crt          =
 +
| output sdvo        =
 +
| output dsi          =
 +
| output edp          = Yes
 +
| output dp          = Yes
 +
| output hdmi        = Yes
 +
| output vga          =
 +
| output dvi          = Yes
 +
 +
| directx ver        = 12
 +
| opengl ver        = 4.4
 +
| opencl ver        = 2.0
 +
| hdmi ver          = 1.4a
 +
| dp ver            = 1.2
 +
| edp ver            = 1.3
 +
| max res hdmi      = 4096x2304
 +
| max res hdmi freq  = 24 Hz
 +
| max res dp        = 4096x2304
 +
| max res dp freq    = 60 Hz
 +
| max res edp        = 4096x2304
 +
| max res edp freq  = 60 Hz
 +
| max res vga        =
 +
| max res vga freq  =
 +
 +
| features            = Yes
 +
| intel quick sync    = Yes
 +
| intel intru 3d      = Yes
 +
| intel insider        =
 +
| intel widi          =
 +
| intel fdi            =
 +
| intel clear video    = Yes
 +
| intel clear video hd = Yes
 +
}}
 +
{{skylake hardware accelerated video table|col=1}}

Revision as of 00:56, 8 July 2017

Template:mpu


Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$6 MiB
6,144 KiB
6,291,456 B
0.00586 GiB
  4x1.5 MiB write-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR3-1866, DDR3L-1600, DDR4-2133
Supports ECCNo
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Graphics

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics 530
DesignerIntelDevice ID0x191B
Execution Units24Max Displays3
Max Memory64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
Frequency350 MHz
0.35 GHz
350,000 KHz
Burst Frequency1,050 MHz
1.05 GHz
1,050,000 KHz
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4096x2304 @24 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz
Standards
DirectX12
OpenGL4.4
OpenCL2.0
DP1.2
eDP1.3
HDMI1.4a
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i7/i7-6700hq&oldid=53005"
Facts about "Core i7-6700HQ - Intel"
RDF feed
device id0x191B +
has ecc memory supportfalse +
integrated gpuHD Graphics 530 +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units24 +
integrated gpu max frequency1,050 MHz (1.05 GHz, 1,050,000 KHz) +
integrated gpu max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
supported memory typeLPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 +