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Difference between revisions of "intel/xeon e3/e3-1505m v5"
< intel

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|s-spec=SR2FN
 
|s-spec=SR2FN
 
|market=Mobile
 
|market=Mobile
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|first announced=September, 2015
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|first announced=September 1, 2015
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|first launched=October, 2015
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|first launched=October 12, 2015
 
|release price=$434
 
|release price=$434
 
|family=Xeon E3
 
|family=Xeon E3
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|max cpus=1
 
|max cpus=1
 
|max memory=64 GiB
 
|max memory=64 GiB
 +
|v core min=0.55 V
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|v core max=1.52 V
 
|tdp=45 W
 
|tdp=45 W
 
|ctdp down=35 W
 
|ctdp down=35 W

Revision as of 23:23, 7 July 2017

Template:mpu Xeon E3-1505M v5 is a 64-bit quad-core x86 mobile workstation microprocessor introduced by Intel in early-2016. This processor, which is based on the Skylake microarchitecture, is manufactured on Intel's 14 nm process. The E3-1505M v5 operates at 2.8 GHz with a TDP of 45 W and with a Turbo Boost frequency of 3.7 GHz for a single active core. This MPU supports up to 64 GiB of dual-channel ECC DDR4-2133 memory and incorporates Intel's HD Graphics P530 IGP operating at 350 MHz with a burst frequency of 1.05 GHz.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB write-back

Graphics

Integrated Graphic Information
GPU Intel HD Graphics P530
Device ID 0x191D
Execution Units 24
Displays 3
Frequency 350 MHz
0.35 GHz
350,000 KHz
Max frequency 1.05 GHz
1,050 MHz
1,050,000 KHz
Max memory 1.7 GiB
1,740.8 MiB
1,782,579.2 KiB
1,825,361,100.8 B
Output DisplayPort, Embedded DisplayPort, HDMI, DVI
DirectX 12.1
OpenGL 4.4
OpenCL 2.0
HDMI 1.4
DP 1.2
eDP 1.3
Max HDMI Res 4096x2160 @24 Hz
Max DP Res 4096x2304 @60 Hz
Max eDP Res 4096x2304 @60 Hz
Intel Quick Sync Video
Intel InTru 3D
Intel Insider
Intel WiDi (Wireless Display)
Intel Clear Video

Memory controller

Integrated Memory Controller
Type LPDDR3-1600, LPDDR3-1866, DDR4-1866, DDR4-2133
Controllers 1
Channels 2
ECC Support Yes
Max bandwidth 34.1 GB/s
Max memory 64 GiB

Expansions

Template:mpu expansions

Features

Template:mpu features

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Facts about "Xeon E3-1505M v5 - Intel"
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device id0x191D +
has featureintegrated gpu +
integrated gpuIntel HD Graphics P530 +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu max frequency1,050 MHz (1.05 GHz, 1,050,000 KHz) +
integrated gpu max memory1,740.8 MiB (1,782,579.2 KiB, 1,825,361,100.8 B, 1.7 GiB) +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +