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Difference between revisions of "intel/xeon e3/e3-1268l v5"
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{{intel title|Xeon E3-1268L v5}} | {{intel title|Xeon E3-1268L v5}} | ||
{{mpu | {{mpu | ||
− | | name | + | |name=Xeon E3-1268L v5 |
− | | | + | |image=skylake dt (front).png |
− | + | |designer=Intel | |
− | + | |manufacturer=Intel | |
− | + | |model number=E3-1268L v5 | |
− | | designer | + | |part number=CM8066201937901 |
− | | manufacturer | + | |s-spec=SR2LQ |
− | | model number | + | |market=Embedded |
− | | part number | + | |first announced=October 19, 2015 |
− | | | + | |first launched=October 19, 2015 |
− | | market | + | |release price=$377 |
− | + | |family=Xeon E3 | |
− | | first announced | + | |series=E3-1200 v5 |
− | | first launched | + | |locked=Yes |
− | + | |frequency=2,400 MHz | |
− | + | |turbo frequency1=3,400 MHz | |
− | | release price | + | |turbo frequency2=3,300 MHz |
− | + | |turbo frequency3=3,200 MHz | |
− | | family | + | |turbo frequency4=3,100 MHz |
− | | series | + | |bus type=DMI 3.0 |
− | | locked | + | |bus rate=8 GT/s |
− | | frequency | + | |clock multiplier=24 |
− | + | |cpuid=506E3 | |
− | | turbo frequency1 | + | |isa=x86-64 |
− | | turbo frequency2 | + | |isa family=x86 |
− | | turbo frequency3 | + | |microarch=Skylake |
− | | turbo frequency4 | + | |platform=Greenlow |
− | | bus type | + | |chipset=Sunrise Point |
− | + | |core name=Skylake DT | |
− | | bus rate | + | |core family=6 |
− | | clock multiplier | + | |core model=14 |
− | + | |core stepping=R0 | |
− | + | |process=14 nm | |
− | + | |technology=CMOS | |
− | + | |die area=122 mm² | |
− | | cpuid | + | |word size=64 bit |
− | + | |core count=4 | |
− | | isa | + | |thread count=8 |
− | | isa | + | |max cpus=1 |
− | | microarch | + | |max memory=64 GiB |
− | | platform | + | |v core min=0.55 V |
− | | chipset | + | |v core max=1.52 V |
− | | core name | + | |tdp=35 W |
− | | core family | + | |tjunc min=0 °C |
− | | core model | + | |tjunc max=100 °C |
− | | core stepping | + | |tstorage min=-25 °C |
− | | process | + | |tstorage max=125 °C |
− | + | |package module 1={{packages/intel/lga-1151}} | |
− | | technology | + | |turbo frequency=Yes |
− | | die area | ||
− | | word size | ||
− | | core count | ||
− | | thread count | ||
− | | max cpus | ||
− | | max memory | ||
− | |||
− | |||
− | | v core min | ||
− | | v core max | ||
− | |||
− | | tdp | ||
− | | tjunc min | ||
− | | tjunc max | ||
− | |||
− | |||
− | | tstorage min | ||
− | | tstorage max | ||
− | |||
− | |||
− | |||
− | | package module 1 | ||
}} | }} | ||
'''Xeon E3-1268L v5''' is an entry-level server and workstation {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 2.4 GHz with turbo boost of 3.4 GHz. The E3-1268L v5 is an ultra low power chip with a TDP of 35 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]] underclocked to 350 MHz. | '''Xeon E3-1268L v5''' is an entry-level server and workstation {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 2.4 GHz with turbo boost of 3.4 GHz. The E3-1268L v5 is an ultra low power chip with a TDP of 35 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]] underclocked to 350 MHz. |
Revision as of 20:50, 6 July 2017
Template:mpu Xeon E3-1268L v5 is an entry-level server and workstation 64-bit quad-core x86 microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 2.4 GHz with turbo boost of 3.4 GHz. The E3-1268L v5 is an ultra low power chip with a TDP of 35 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has the HD Graphics P530 IGP underclocked to 350 MHz.
Cache
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options
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Graphics
Integrated Graphics Information
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[Edit] Skylake (Gen9) Hardware Accelerated Video Capabilities | |||||||
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Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, SHP, MHP | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High | 3840x3840 | |||
VP8 | Unified | Unified | - | 0 | Unified | 1080p | |
VP9 | ✘ | 0 | Unified | 2160p (4K) |
Features
[Edit/Modify Supported Features]
Facts about "Xeon E3-1268L v5 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E3-1268L v5 - Intel#io + |
device id | 0x191D + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology + and OS Guard + |
has intel enhanced speedstep technology | true + |
has intel secure key technology | true + |
has intel speed shift technology | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
integrated gpu | HD Graphics P530 + |
integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 24 + |
integrated gpu max frequency | 1,000 MHz (1 GHz, 1,000,000 KHz) + |
integrated gpu max memory | 1,740.8 MiB (1,782,579.2 KiB, 1,825,361,100.8 B, 1.7 GiB) + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
max memory bandwidth | 35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 16 + |
supported memory type | DDR3L-1600 + and DDR4-2133 + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |