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Difference between revisions of "intel/xeon e3/e3-1558l v5"
< intel

(Created page with "{{intel title|Xeon E3-1558L v5}} {{mpu}}")
 
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{{intel title|Xeon E3-1558L v5}}
 
{{intel title|Xeon E3-1558L v5}}
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{{mpu}}
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{{mpu
 +
|name=Xeon E3-1558L v5
 +
|image=skylake h (front).png
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|designer=Intel
 +
|manufacturer=Intel
 +
|model number=E3-1558L v5
 +
|s-spec=SR2TU
 +
|market=Mobile
 +
|family=Xeon E3
 +
|series=E3-1500 v5
 +
|locked=Yes
 +
|frequency=1,900 MHz
 +
|turbo frequency1=3,300 MHz
 +
|turbo frequency2=3,200 MHz
 +
|turbo frequency3=3,100 MHz
 +
|turbo frequency4=3,100 MHz
 +
|bus type=DMI 3.0
 +
|bus links=4
 +
|bus rate=8 GT/s
 +
|clock multiplier=19
 +
|isa=x86-64
 +
|isa family=x86
 +
|microarch=Skylake
 +
|core name=Skylake H
 +
|core family=6
 +
|core model=94
 +
|core stepping=N0
 +
|process=14 nm
 +
|technology=CMOS
 +
|die area=122 mm²
 +
|word size=64 bit
 +
|core count=4
 +
|thread count=8
 +
|max cpus=1
 +
|tdp=45 W
 +
|tjunc min=0 °C
 +
|tjunc max=100 °C
 +
|tstorage min=-25 °C
 +
|tstorage max=125 °C
 +
|package module 1={{packages/intel/fcbga-1440}}
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}}

Revision as of 17:58, 4 July 2017

Template:mpu

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