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Difference between revisions of "intel/xeon gold/6134m"
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{{intel title|Xeon Gold 6134M}} | {{intel title|Xeon Gold 6134M}} | ||
{{mpu | {{mpu | ||
| − | | future | + | |future=Yes |
| − | | name | + | |name=Xeon Gold 6134M |
| − | | no image | + | |no image=Yes |
| − | + | |designer=Intel | |
| − | + | |manufacturer=Intel | |
| − | + | |model number=6134M | |
| − | | designer | + | |part number=CD8067303330402 |
| − | | manufacturer | + | |s-spec=SR3AS |
| − | | model number | + | |market=Server |
| − | | part number | + | |first announced=April 25, 2017 |
| − | + | |family=Xeon Gold | |
| − | + | |series=6100 | |
| − | | s-spec | + | |locked=Yes |
| − | + | |frequency=3.2 GHz | |
| − | | market | + | |bus type=DMI 3.0 |
| − | | first announced | + | |bus links=4 |
| − | + | |bus rate=8 GT/s | |
| − | + | |clock multiplier=32 | |
| − | + | |isa=x86-64 | |
| − | + | |isa family=x86 | |
| − | + | |microarch=Skylake | |
| − | | family | + | |platform=Purley |
| − | | series | + | |chipset=Lewisburg |
| − | | locked | + | |core name=Skylake SP |
| − | | frequency | + | |core family=6 |
| − | + | |core stepping=H0 | |
| − | + | |process=14 nm | |
| − | + | |technology=CMOS | |
| − | + | |die area=<!-- XX mm² --> | |
| − | + | |word size=64 bit | |
| − | + | |max cpus=4 | |
| − | + | |v core tolerance=<!-- OR ... --> | |
| − | + | |v io 2=<!-- OR ... --> | |
| − | + | |temp min=<!-- use TJ/TC whenever possible instead --> | |
| − | | bus type | + | |tjunc min=<!-- .. °C --> |
| − | | bus | + | |package module 2=<!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE --------------> |
| − | | bus rate | + | |packaging=Yes |
| − | + | |package 0=FCLGA-3647 | |
| − | | clock multiplier | + | |package 0 type=LGA |
| − | + | |package 0 pins=3647 | |
| − | + | |socket 0=LGA-3647 | |
| − | + | |socket 0 type=LGA | |
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| − | <!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE --------------> | ||
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}} | }} | ||
'''Xeon Gold 6134M''' is a {{arch|64}} [[x86]] high-performance server [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 6134M operates at 3.2 GHz | '''Xeon Gold 6134M''' is a {{arch|64}} [[x86]] high-performance server [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 6134M operates at 3.2 GHz | ||
Revision as of 23:57, 29 June 2017
Template:mpu Xeon Gold 6134M is a 64-bit x86 high-performance server multiprocessor set to be introduced by Intel in the second quarter of 2017. This processor is based on the server configuration of the Skylake microarchitecture (a Skylake SP core) and is manufactured on Intel's 14 nm process. The 6134M operates at 3.2 GHz
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Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release. |
Features
[Edit/Modify Supported Features]
Facts about "Xeon Gold 6134M - Intel"
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions + and OS Guard + |
| has intel enhanced speedstep technology | true + |
| has intel supervisor mode execution protection | true + |
| has intel vpro technology | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| x86/has memory protection extensions | true + |