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Difference between revisions of "intel/core i7/i7-7740x"
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|core name=Kaby Lake X | |core name=Kaby Lake X | ||
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|process=14 nm | |process=14 nm | ||
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|package module 1={{packages/intel/lga-2066}} | |package module 1={{packages/intel/lga-2066}} | ||
|part number 1=BXC80677I77740X | |part number 1=BXC80677I77740X | ||
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'''Core i7-7740X''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in [[2017]]. This processor, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is manufactured on Intel's improved [[14 nm process|14nm+ process]]. The i7-7740X operates at 4.3 GHz with a TDP of 112 W and a {{intel|Turbo Boost}} frequency of 4.5 GHz for a single active core. This MPU supports up to 64 GiB of dual-channel DDR4-2666 memory. | '''Core i7-7740X''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in [[2017]]. This processor, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is manufactured on Intel's improved [[14 nm process|14nm+ process]]. The i7-7740X operates at 4.3 GHz with a TDP of 112 W and a {{intel|Turbo Boost}} frequency of 4.5 GHz for a single active core. This MPU supports up to 64 GiB of dual-channel DDR4-2666 memory. | ||
Revision as of 16:26, 27 June 2017
Template:mpu Core i7-7740X is a 64-bit quad-core high-end performance x86 desktop microprocessor introduced by Intel in 2017. This processor, which is based on the Kaby Lake microarchitecture, is manufactured on Intel's improved 14nm+ process. The i7-7740X operates at 4.3 GHz with a TDP of 112 W and a Turbo Boost frequency of 4.5 GHz for a single active core. This MPU supports up to 64 GiB of dual-channel DDR4-2666 memory.
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Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release. |
Cache
- Main article: Kaby Lake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
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Expansion Options
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Graphics
This processor has no integrated graphics.
Features
[Edit/Modify Supported Features]
Facts about "Core i7-7740X - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i7-7740X - Intel#io + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has ecc memory support | false + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions + and Software Guard Extensions + |
| has intel enhanced speedstep technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
| l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
| max memory bandwidth | 39.74 GiB/s (40,693.76 MiB/s, 42.671 GB/s, 42,670.5 MB/s, 0.0388 TiB/s, 0.0427 TB/s) + |
| max memory channels | 2 + |
| max pcie lanes | 16 + |
| supported memory type | DDR4-2666 + |
| x86/has memory protection extensions | true + |
| x86/has software guard extensions | true + |