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Difference between revisions of "amd/k6/amd-k6-200alr"
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| power              = 20 W
 
| power              = 20 W
 
| v core              = 2.9 V
 
| v core              = 2.9 V

Revision as of 20:55, 23 June 2017

Template:mpu AMD-K6-200ALR was a 32-bit x86 microprocessor designed by AMD and introduced in early 1997. This chip, which was based on AMD's new K6 microarchitecture, operated at 200 MHz and dissipated a maximum of 20 W.

Cache

Main article: K6 § Cache

L2$ can be 256 KiB to 1 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Auto-power down state
  • Stop clock state

Documents

DataSheet

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/k6/amd-k6-200alr&oldid=47230"
Facts about "AMD-K6-200ALR - AMD"
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l1d$ description2-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description2-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +