From WikiChip
					
    Difference between revisions of "amd/k6/amd-k6/300afr"    
                	
														|  (→Cache) | m (Bot: corrected mem) | ||
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| | thread count        = 1 | | thread count        = 1 | ||
| | max cpus            = 1 | | max cpus            = 1 | ||
| − | | max memory          = 4  | + | | max memory          = 4 GiB | 
| | max memory addr     =   | | max memory addr     =   | ||
Revision as of 02:31, 23 June 2017
Template:mpu AMD-K6/300AFR was a 32-bit x86 microprocessor designed by AMD and introduced in early 1998. This chip, which was based on AMD's new K6 microarchitecture, operated at 300 MHz and dissipated a maximum of 15.4 W.
Cache
- Main article: K6 § Cache
L2$ can be 256 KiB to 1 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.
| Cache Info [Edit Values] | ||
| L1I$ | 32 KiB 32,768 B  0.0313 MiB | 1x32 KiB 2-way set associative | 
| L1D$ | 32 KiB 32,768 B  0.0313 MiB | 1x32 KiB 2-way set associative | 
Graphics
This SoC has no integrated graphics processing unit.
Features
- Auto-power down state
- Stop clock state
Gallery
Documents
DataSheet
- AMD-K6 Processor Data Sheet; Publication #20695 Revision H/0; March 1998
Facts about "AMD-K6/300AFR  - AMD"
| l1d$ description | 2-way set associative + | 
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + | 
| l1i$ description | 2-way set associative + | 
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + | 

