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Difference between revisions of "Template:finfet nodes comp"
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{| class="wikitable" style="margin:0; {{{style|}}}" | {| class="wikitable" style="margin:0; {{{style|}}}" | ||
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | + | ! colspan="2" | {{{process 1 fab|}}}<!-- | |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 2 fab|}}} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 3 fab|}}} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 4 fab|}}} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 5 fab|}}} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 6 fab|}}} }} | ||
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | colspan="2" | {{{process 1 name}}} || colspan="2" | {{{process 2 name}}} || colspan="2" | {{{process | + | | colspan="2" | {{{process 1 name|}}}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 2 name|}}} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 3 name|}}} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 4 name|}}} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 5 name|}}} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 6 name|}}} }} | ||
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | colspan="2" | {{{process 1 date}}} || colspan="2" | {{{process 2 date}}} || colspan="2" | {{{process | + | | colspan="2" | {{{process 1 date|}}}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 2 date|}}} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 3 date|}}} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 4 date|}}} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 5 date|}}} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 6 date|}}} }} | ||
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | colspan="2" | {{{process 1 | + | | colspan="2" | {{{process 1 lith|}}}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 2 lith|}}} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 3 lith|}}} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 4 lith|}}} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 5 lith|}}} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 6 lith|}}} }} | ||
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | colspan="2" | {{{process 1 | + | | colspan="2" | {{{process 1 immersion|}}}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 2 immersion|}}} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 3 immersion|}}} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 4 immersion|}}} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 5 immersion|}}} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 6 immersion|}}} }} | ||
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | colspan="2" | {{{process 1 | + | | colspan="2" | {{{process 1 exposure|}}}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 2 exposure|}}} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 3 exposure|}}} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 4 exposure|}}} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 5 exposure|}}} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 6 exposure|}}} }} | ||
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | colspan="2" | {{{process 1 volt}}} || colspan="2" | {{{process 2 volt}}} || colspan="2" | {{{process | + | | colspan="2" | {{{process 1 wafer type|}}}<!-- |
− | |- | + | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 2 wafer type|}}} }}<!-- |
− | ! Value !! {{{process 1 delta from}}} !! Value !! {{{process 2 delta from}}} !! Value !! {{{process 3 delta from}}} | + | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 3 wafer type|}}} }}<!-- |
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 4 wafer type|}}} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 5 wafer type|}}} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 6 wafer type|}}} }} | ||
+ | |- style="text-align: center;" | ||
+ | | colspan="2" | {{{process 1 wafer size|}}}<!-- | ||
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 2 wafer size|}}} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 3 wafer size|}}} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 4 wafer size|}}} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 5 wafer size|}}} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 6 wafer size|}}} }} | ||
+ | |- style="text-align: center;" | ||
+ | | colspan="2" | {{{process 1 transistor|}}}<!-- | ||
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 2 transistor|}}} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 3 transistor|}}} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 4 transistor|}}} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 5 transistor|}}} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 6 transistor|}}} }} | ||
+ | |- style="text-align: center;" | ||
+ | | colspan="2" | {{{process 1 volt|}}}<!-- | ||
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 2 volt|}}} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 3 volt|}}} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 4 volt|}}} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 5 volt|}}} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 6 volt|}}} }} | ||
+ | |- | ||
+ | ! Value !! {{{process 1 delta from|}}}<!-- | ||
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} Value {{!}}{{!}} {{{process 2 delta from|}}} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} Value {{!}}{{!}} {{{process 3 delta from|}}} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} Value {{!}}{{!}} {{{process 4 delta from|}}} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} Value {{!}}{{!}} {{{process 5 delta from|}}} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} Value {{!}}{{!}} {{{process 6 delta from|}}} }} | ||
|- | |- | ||
− | | {{{process 1 fin pitch}}} || {{{process 1 fin pitch Δ}}} || {{{process 2 fin pitch}}} || {{{process 2 fin pitch Δ}}} || {{{process 3 fin pitch}}} || {{{process 3 fin pitch Δ}}} | + | | {{#ifeq: {{{process 1 fin pitch|}}} | - | rowspan="3" colspan="2" style="background: #a3a3a3;" {{!}} N/A | {{{process 1 fin pitch|}}} {{!}}{{!}} {{#ifeq: {{{process 1 fin pitch Δ|}}} | - | rowspan="{{#ifeq: {{{process 1 gate len Δ|}}} | - | 10 | 3 }}" style="background: #a3a3a3;" {{!}} N/A | {{{process 1 fin pitch Δ|}}} }} }}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} {{#ifeq: {{{process 2 fin pitch|}}} | - | rowspan="3" colspan="2" style="background: #a3a3a3;" {{!}} N/A | {{{process 2 fin pitch|}}} {{!}}{{!}} {{#ifeq: {{{process 2 fin pitch Δ|}}} | - | rowspan="{{#ifeq: {{{process 2 gate len Δ|}}} | - | 10 | 3 }}" style="background: #a3a3a3;" {{!}} N/A | {{{process 2 fin pitch Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} {{#ifeq: {{{process 3 fin pitch|}}} | - | rowspan="3" colspan="2" style="background: #a3a3a3;" {{!}} N/A | {{{process 3 fin pitch|}}} {{!}}{{!}} {{#ifeq: {{{process 3 fin pitch Δ|}}} | - | rowspan="{{#ifeq: {{{process 3 gate len Δ|}}} | - | 10 | 3 }}" style="background: #a3a3a3;" {{!}} N/A | {{{process 3 fin pitch Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} {{#ifeq: {{{process 4 fin pitch|}}} | - | rowspan="3" colspan="2" style="background: #a3a3a3;" {{!}} N/A | {{{process 4 fin pitch|}}} {{!}}{{!}} {{#ifeq: {{{process 4 fin pitch Δ|}}} | - | rowspan="{{#ifeq: {{{process 4 gate len Δ|}}} | - | 10 | 3 }}" style="background: #a3a3a3;" {{!}} N/A | {{{process 4 fin pitch Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} {{#ifeq: {{{process 5 fin pitch|}}} | - | rowspan="3" colspan="2" style="background: #a3a3a3;" {{!}} N/A | {{{process 5 fin pitch|}}} {{!}}{{!}} {{#ifeq: {{{process 5 fin pitch Δ|}}} | - | rowspan="{{#ifeq: {{{process 5 gate len Δ|}}} | - | 10 | 3 }}" style="background: #a3a3a3;" {{!}} N/A | {{{process 5 fin pitch Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} {{#ifeq: {{{process 6 fin pitch|}}} | - | rowspan="3" colspan="2" style="background: #a3a3a3;" {{!}} N/A | {{{process 6 fin pitch|}}} {{!}}{{!}} {{#ifeq: {{{process 6 fin pitch Δ|}}} | - | rowspan="{{#ifeq: {{{process 6 gate len Δ|}}} | - | 10 | 3 }}" style="background: #a3a3a3;" {{!}} N/A | {{{process 6 fin pitch Δ|}}} }} }} }} | ||
|- | |- | ||
− | | {{{process 1 fin width}}} || {{{process 1 fin width Δ}}} || {{{process 2 fin width}}} || {{{process 2 fin width Δ}}} || {{{process 3 fin width}}} || {{{process 3 fin width Δ}}} | + | | {{#ifeq: {{{process 1 fin pitch|}}} | - | | {{{process 1 fin width|}}} {{#ifeq: {{{process 1 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 1 fin width Δ|}}} }} }}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{#ifeq: {{{process 2 fin pitch|}}} | - | | {{!}}{{!}} {{{process 2 fin width|}}} {{#ifeq: {{{process 2 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 2 fin width Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{#ifeq: {{{process 3 fin pitch|}}} | - | | {{!}}{{!}} {{{process 3 fin width|}}} {{#ifeq: {{{process 3 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 3 fin width Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{#ifeq: {{{process 4 fin pitch|}}} | - | | {{!}}{{!}} {{{process 4 fin width|}}} {{#ifeq: {{{process 4 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 4 fin width Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{#ifeq: {{{process 5 fin pitch|}}} | - | | {{!}}{{!}} {{{process 5 fin width|}}} {{#ifeq: {{{process 5 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 5 fin width Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{#ifeq: {{{process 6 fin pitch|}}} | - | | {{!}}{{!}} {{{process 6 fin width|}}} {{#ifeq: {{{process 6 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 6 fin width Δ|}}} }} }} }} | ||
|- | |- | ||
− | | {{{process 1 fin height}}} || {{{process 1 fin height Δ}}} || {{{process 2 fin height}}} || {{{process 2 fin height Δ}}} || {{{process 3 fin height}}} || {{{process 3 fin height Δ}}} | + | | {{#ifeq: {{{process 1 fin pitch|}}} | - | | {{{process 1 fin height|}}} {{#ifeq: {{{process 1 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 1 fin height Δ|}}} }} }}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{#ifeq: {{{process 2 fin pitch|}}} | - | | {{!}}{{!}} {{{process 2 fin height|}}} {{#ifeq: {{{process 2 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 2 fin height Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{#ifeq: {{{process 3 fin pitch|}}} | - | | {{!}}{{!}} {{{process 3 fin height|}}} {{#ifeq: {{{process 3 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 3 fin height Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{#ifeq: {{{process 4 fin pitch|}}} | - | | {{!}}{{!}} {{{process 4 fin height|}}} {{#ifeq: {{{process 4 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 4 fin height Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{#ifeq: {{{process 5 fin pitch|}}} | - | | {{!}}{{!}} {{{process 5 fin height|}}} {{#ifeq: {{{process 5 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 5 fin height Δ|}}} }} }} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{#ifeq: {{{process 6 fin pitch|}}} | - | | {{!}}{{!}} {{{process 6 fin height|}}} {{#ifeq: {{{process 6 fin pitch Δ|}}} | - | | {{!}}{{!}} {{{process 6 fin height Δ|}}} }} }} }} | ||
|- | |- | ||
− | | {{{process 1 gate len}}} || {{{process 1 gate len Δ}}} || {{{process 2 gate len}}} || {{{process 2 gate len Δ}}} || {{{process 3 gate len}}} || {{{process 3 gate len Δ}}} | + | | {{{process 1 gate len|}}} || {{#ifeq: {{{process 1 gate len Δ|}}} | - | | {{{process 1 gate len Δ|}}} }}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} {{{process 2 gate len|}}} {{#ifeq: {{{process 2 gate len Δ|}}} | - | | {{!}}{{!}} {{{process 2 gate len Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} {{{process 3 gate len|}}} {{#ifeq: {{{process 3 gate len Δ|}}} | - | | {{!}}{{!}} {{{process 3 gate len Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} {{{process 4 gate len|}}} {{#ifeq: {{{process 4 gate len Δ|}}} | - | | {{!}}{{!}} {{{process 4 gate len Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} {{{process 5 gate len|}}} {{#ifeq: {{{process 5 gate len Δ|}}} | - | | {{!}}{{!}} {{{process 5 gate len Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} {{{process 6 gate len|}}} {{#ifeq: {{{process 6 gate len Δ|}}} | - | | {{!}}{{!}} {{{process 6 gate len Δ|}}} }} }} | ||
|- | |- | ||
− | | {{{process 1 cpp}}} || {{{process 1 cpp Δ}}} || {{{process 2 cpp}}} || {{{process 2 cpp Δ}}} || {{{process 3 cpp}}} || {{{process 3 cpp Δ}}} | + | | {{{process 1 cpp|}}} || {{#ifeq: {{{process 1 cpp Δ|}}} | - | | {{{process 1 cpp Δ|}}} }}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} {{{process 2 cpp|}}} {{#ifeq: {{{process 2 cpp Δ|}}} | - | | {{!}}{{!}} {{{process 2 cpp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} {{{process 3 cpp|}}} {{#ifeq: {{{process 3 cpp Δ|}}} | - | | {{!}}{{!}} {{{process 3 cpp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} {{{process 4 cpp|}}} {{#ifeq: {{{process 4 cpp Δ|}}} | - | | {{!}}{{!}} {{{process 4 cpp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} {{{process 5 cpp|}}} {{#ifeq: {{{process 5 cpp Δ|}}} | - | | {{!}}{{!}} {{{process 5 cpp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} {{{process 6 cpp|}}} {{#ifeq: {{{process 6 cpp Δ|}}} | - | | {{!}}{{!}} {{{process 6 cpp Δ|}}} }} }} | ||
|- | |- | ||
− | | {{{process 1 mmp}}} || {{{process 1 mmp Δ}}} || {{{process 2 mmp}}} || {{{process 2 mmp Δ}}} || {{{process 3 mmp}}} || {{{process 3 mmp Δ}}} | + | | {{{process 1 mmp|}}} || {{#ifeq: {{{process 1 mmp Δ|}}} | - | | {{{process 1 mmp Δ|}}} }}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} {{{process 2 mmp|}}} {{#ifeq: {{{process 2 mmp Δ|}}} | - | | {{!}}{{!}} {{{process 2 mmp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} {{{process 3 mmp|}}} {{#ifeq: {{{process 3 mmp Δ|}}} | - | | {{!}}{{!}} {{{process 3 mmp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} {{{process 4 mmp|}}} {{#ifeq: {{{process 4 mmp Δ|}}} | - | | {{!}}{{!}} {{{process 4 mmp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} {{{process 5 mmp|}}} {{#ifeq: {{{process 5 mmp Δ|}}} | - | | {{!}}{{!}} {{{process 5 mmp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} {{{process 6 mmp|}}} {{#ifeq: {{{process 6 mmp Δ|}}} | - | | {{!}}{{!}} {{{process 6 mmp Δ|}}} }} }} | ||
|- | |- | ||
− | | {{{process 1 sram hp}}} || {{{process 1 sram hp Δ}}} || {{{process 2 sram hp}}} || {{{process 2 sram hp Δ}}} || {{{process 3 sram hp}}} || {{{process 3 sram hp Δ}}} | + | | {{{process 1 sram hp|}}} || {{#ifeq: {{{process 1 sram hp Δ|}}} | - | | {{{process 1 sram hp Δ|}}} }}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} {{{process 2 sram hp|}}} {{#ifeq: {{{process 2 sram hp Δ|}}} | - | | {{!}}{{!}} {{{process 2 sram hp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} {{{process 3 sram hp|}}} {{#ifeq: {{{process 3 sram hp Δ|}}} | - | | {{!}}{{!}} {{{process 3 sram hp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} {{{process 4 sram hp|}}} {{#ifeq: {{{process 4 sram hp Δ|}}} | - | | {{!}}{{!}} {{{process 4 sram hp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} {{{process 5 sram hp|}}} {{#ifeq: {{{process 5 sram hp Δ|}}} | - | | {{!}}{{!}} {{{process 5 sram hp Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} {{{process 6 sram hp|}}} {{#ifeq: {{{process 6 sram hp Δ|}}} | - | | {{!}}{{!}} {{{process 6 sram hp Δ|}}} }} }} | ||
|- | |- | ||
− | | {{{process 1 sram hd}}} || {{{process 1 sram hd Δ}}} || {{{process 2 sram hd}}} || {{{process 2 sram hd Δ}}} || {{{process 3 sram hd}}} || {{{process 3 sram hd Δ}}} | + | | {{{process 1 sram hd|}}} || {{#ifeq: {{{process 1 sram hd Δ|}}} | - | | {{{process 1 sram hd Δ|}}} }}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} {{{process 2 sram hd|}}} {{#ifeq: {{{process 2 sram hd Δ|}}} | - | | {{!}}{{!}} {{{process 2 sram hd Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} {{{process 3 sram hd|}}} {{#ifeq: {{{process 3 sram hd Δ|}}} | - | | {{!}}{{!}} {{{process 3 sram hd Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} {{{process 4 sram hd|}}} {{#ifeq: {{{process 4 sram hd Δ|}}} | - | | {{!}}{{!}} {{{process 4 sram hd Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} {{{process 5 sram hd|}}} {{#ifeq: {{{process 5 sram hd Δ|}}} | - | | {{!}}{{!}} {{{process 5 sram hd Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} {{{process 6 sram hd|}}} {{#ifeq: {{{process 6 sram hd Δ|}}} | - | | {{!}}{{!}} {{{process 6 sram hd Δ|}}} }} }} | ||
|- | |- | ||
− | | {{{process 1 sram lv}}} || {{{process 1 sram lv Δ}}} || {{{process 2 sram lv}}} || {{{process 2 sram lv Δ}}} || {{{process 3 sram lv}}} || {{{process 3 sram lv Δ}}} | + | | {{{process 1 sram lv|}}} || {{#ifeq: {{{process 1 sram lv Δ|}}} | - | | {{{process 1 sram lv Δ|}}} }}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} {{{process 2 sram lv|}}} {{#ifeq: {{{process 2 sram lv Δ|}}} | - | | {{!}}{{!}} {{{process 2 sram lv Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} {{{process 3 sram lv|}}} {{#ifeq: {{{process 3 sram lv Δ|}}} | - | | {{!}}{{!}} {{{process 3 sram lv Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} {{{process 4 sram lv|}}} {{#ifeq: {{{process 4 sram lv Δ|}}} | - | | {{!}}{{!}} {{{process 4 sram lv Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} {{{process 5 sram lv|}}} {{#ifeq: {{{process 5 sram lv Δ|}}} | - | | {{!}}{{!}} {{{process 5 sram lv Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} {{{process 6 sram lv|}}} {{#ifeq: {{{process 6 sram lv Δ|}}} | - | | {{!}}{{!}} {{{process 6 sram lv Δ|}}} }} }} | ||
|- | |- | ||
− | | {{{process 1 dram}}} || {{{process 1 dram Δ}}} || {{{process 2 dram}}} || {{{process 2 dram Δ}}} || {{{process 3 dram}}} || {{{process 3 dram Δ}}} | + | | {{{process 1 dram|}}} || {{#ifeq: {{{process 1 dram Δ|}}} | - | | {{{process 1 dram Δ|}}} }}<!-- |
+ | -->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} {{{process 2 dram|}}} {{#ifeq: {{{process 2 dram Δ|}}} | - | | {{!}}{{!}} {{{process 2 dram Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} {{{process 3 dram|}}} {{#ifeq: {{{process 3 dram Δ|}}} | - | | {{!}}{{!}} {{{process 3 dram Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} {{{process 4 dram|}}} {{#ifeq: {{{process 4 dram Δ|}}} | - | | {{!}}{{!}} {{{process 4 dram Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} {{{process 5 dram|}}} {{#ifeq: {{{process 5 dram Δ|}}} | - | | {{!}}{{!}} {{{process 5 dram Δ|}}} }} }}<!-- | ||
+ | -->{{#if: {{{process 6 fab|}}}| {{!}}{{!}} {{{process 6 dram|}}} {{#ifeq: {{{process 6 dram Δ|}}} | - | | {{!}}{{!}} {{{process 6 dram Δ|}}} }} }} | ||
|} | |} | ||
+ | </div> |
Latest revision as of 08:21, 5 April 2017
Process Name | |
---|---|
1st Production | |
Lithography | Lithography |
Immersion | |
Exposure | |
Wafer | Type |
Size | |
Transistor | Type |
Voltage | |
Fin | Pitch |
Width | |
Height | |
Gate Length (Lg) | |
Contacted Gate Pitch (CPP) | |
Minimum Metal Pitch (MMP) | |
SRAM bitcell | High-Perf (HP) |
High-Density (HD) | |
Low-Voltage (LV) | |
DRAM bitcell | eDRAM |
Value | |
---|---|