From WikiChip
Difference between revisions of "mediatek/helio/mt6755"
< mediatek‎ | helio

(Created page with "{{mediatek title|Helio P10 (MT6755)}} {{mpu | name = MediaTek Helio P10 | no image = yes | image = | image size = | caption...")
 
Line 86: Line 86:
 
| package 0 height    =  
 
| package 0 height    =  
 
}}
 
}}
'''Helio P10''' ('''MT6755''') is a {{arch|64}} [[octa-core]] [[ARM]] [[LTE]] system on a chip designed by [[MediaTek]] and introduced in early-[[2016]]. This SoC, which incorporates eight {{armh|Cortex-A53}} cores and is manufactured on [[TSMC]]'s [[28 nm process]], operates at up to 2 GHz and supports single-channel LPDDR3-933. This chip incorporates the {{imgtec|Mali-T880}} [[IGP]] operating at 700  MHz. This SoC has a modem supporting [[LTE]] User Equipment (UE) category 6.
+
'''Helio P10''' ('''MT6755''') is a {{arch|64}} [[octa-core]] [[ARM]] [[LTE]] system on a chip designed by [[MediaTek]] and introduced in early-[[2016]]. This SoC, which incorporates eight {{armh|Cortex-A53|l=arch}} cores and is manufactured on [[TSMC]]'s [[28 nm process]], operates at up to 2 GHz and supports single-channel LPDDR3-933. This chip incorporates the {{imgtec|Mali-T880}} [[IGP]] operating at 700  MHz. This SoC has a modem supporting [[LTE]] User Equipment (UE) category 6.
 +
 
 +
This processor is made of two independent clusters of {{armh|Cortex-A53|l=arch}} with four cores each linked together via a {{armh|CCI-400}}. The two clusters have a maximum operating frequency of 2 GHz and 1.2 GHz respectively.
 +
 
 +
== Cache ==
 +
{{main|arm holdings/microarchitectures/cortex-a53#Memory_Hierarchy|l1=Cortex-A53 § Cache}}
 +
{{cache size
 +
|l1 cache = 512 KiB
 +
|l1i cache=256 KiB
 +
|l1i break=8x32 KiB
 +
|l1i desc=2-way set associative
 +
|l1d cache=256 KiB
 +
|l1d break=8x32 KiB
 +
|l1d desc=4-way set associative
 +
|l2 cache=2 MiB
 +
|l2 break=2x1 MiB
 +
|l2 desc=16-way set associative
 +
}}
 +
 
 +
== Memory controller ==
 +
{{memory controller
 +
|type=LPDDR3-933
 +
|ecc=No
 +
|max mem=4 GiB
 +
|controllers=1
 +
|channels=1
 +
|max bandwidth=6.95 GiB/s
 +
|bandwidth schan=6.95 GiB/s
 +
}}
 +
 
 +
== Expansions ==
 +
{{expansions
 +
|usb revision=2.0
 +
|usb revision 2=3.0
 +
|usb ports=8
 +
|uart=4
 +
|gp io=Yes
 +
}}
 +
 
 +
== Graphics ==
 +
{{integrated graphics
 +
| gpu                = Mali-T860
 +
| device id          =
 +
| designer            = ARM Holdings
 +
| execution units    = 4
 +
| max displays        =
 +
| max memory          =
 +
| frequency          = 700 MHz
 +
 
 +
| output dsi          = Yes
 +
 
 +
| max res dsi        = 1920x1080
 +
 
 +
| direct3d ver        = 11.2
 +
| opencl ver          = 1.2
 +
| opengl ver          = 3.2
 +
| opengl es ver      = 3.2
 +
| vulkan ver          = 1.0
 +
| openvg ver          = 1.1
 +
}}
 +
 
 +
== Wireless ==
 +
{{wireless links
 +
| wifi              = Yes
 +
| 80211n            = Yes
 +
| 2g                = Yes
 +
| csd              = Yes
 +
| gsm              = Yes
 +
| gprs              = Yes
 +
| edge              = Yes
 +
| cdmaone          =
 +
| is-95a            =
 +
| is-95b            =
 +
| 3g                = Yes
 +
| cdma2000          =
 +
| cdma2000 1x      =
 +
| cdma2000 1xev-do  =
 +
| cdma2000 1x adv  =
 +
| umts              = Yes
 +
| wcdma            = 
 +
| td-scdma          = Yes
 +
| dc-hsdpa          = Yes
 +
| hsdpa            =
 +
| hsupa            = Yes
 +
| 4g                = Yes
 +
| lte a            = Yes
 +
| e-utran          = Yes
 +
| ue cat            = 6
 +
}}
 +
 
 +
== Image ==
 +
* Integrated image signal processor supports 21 MP
 +
* Supports image stabilization
 +
* Supports video stabilization
 +
* Supports noise reduction
 +
* Supports lens shading correction
 +
* Supports AE/AWB/AF
 +
* Supports edge enhancement
 +
* Supports face detection and visual tracking
 +
* Hardware JPEG encoder
 +
 
 +
== Video ==
 +
* HEVC decoder 4k2k @ 30fps
 +
* H.264 decoder (30fps/40Mbps)
 +
* Sorenson H.263/H.263 decoder (1080p @ 60fps/40Mbps)
 +
* MPEG-4 SP/ASP decoder (1080p @ 60fps/40Mbps)
 +
* DIVX4/DIVX5/DIVX6/DIVX HD/XVID decoder  (1080p @ 60fps/40Mbps)
 +
* VP8 / VC-1 decoders
 +
* MPEG-4 / H.263 / H.264 / HEVC encoders
 +
 
 +
== Audio ==
 +
* Audio content sampling rates 8kHz to 192kHz
 +
* Audio content sampling format 8-bit/16-bit/24-bit Mono/Stereo
 +
* I2S, PCM
 +
* Encode: AMR-NB, AMR-WB, AAC, OGG, ADPCM
 +
* Decode: WAV, MP3, MP2, AAC, AMR-NB, AMR-WB, MIDI, Vorbis, APE, AAC-plus v1, AAC-plus v2, FLAC, WMA, ADPCM
 +
* 7.1 channel MHL output
 +
 
 +
== Utilizing devices ==
 +
* [[used by::iMan Victor]]
 +
* [[used by::Blackview BV6000]]
 +
* [[used by::Blackview R7]]
 +
* [[used by::Nomu S30]]
 +
* [[used by::Wolder WIAM #65]]
 +
* [[used by::UMI Super]]
 +
* [[used by::Ulefone Future]]
 +
* [[used by::Oppo R9]]
 +
* [[used by::Elephone P9000]]
 +
* [[used by::Alcatel Flash Plus 2]]
 +
* [[used by::TCL Flash Plus 2]]
 +
* [[used by::Elephone M3]]
 +
* [[used by::Elephone P9000]]
 +
* [[used by::Elephone P9000]]
 +
* [[used by::Elephone P9000]]
 +
* [[used by::Elephone M3]]
 +
 
 +
{{expand list}}

Revision as of 18:25, 5 December 2016

Template:mpu Helio P10 (MT6755) is a 64-bit octa-core ARM LTE system on a chip designed by MediaTek and introduced in early-2016. This SoC, which incorporates eight Cortex-A53 cores and is manufactured on TSMC's 28 nm process, operates at up to 2 GHz and supports single-channel LPDDR3-933. This chip incorporates the Mali-T880 IGP operating at 700 MHz. This SoC has a modem supporting LTE User Equipment (UE) category 6.

This processor is made of two independent clusters of Cortex-A53 with four cores each linked together via a CCI-400. The two clusters have a maximum operating frequency of 2 GHz and 1.2 GHz respectively.

Cache

Main article: Cortex-A53 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
524,288 B
0.5 MiB
L1I$256 KiB
262,144 B
0.25 MiB
8x32 KiB2-way set associative 
L1D$256 KiB
262,144 B
0.25 MiB
8x32 KiB4-way set associative 

L2$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB16-way set associative 

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR3-933
Supports ECCNo
Max Mem4 GiB
Controllers1
Channels1
Max Bandwidth6.95 GiB/s
7,116.8 MiB/s
7.463 GB/s
7,462.506 MB/s
0.00679 TiB/s
0.00746 TB/s
Bandwidth
Single 6.95 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
USB
Revision2.0, 3.0
Ports8
UART

GP I/OYes


Graphics

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUMali-T860
DesignerARM Holdings
Execution Units4
Frequency700 MHz
0.7 GHz
700,000 KHz
OutputDSI

Max Resolution
DSI1920x1080

Standards
Direct3D11.2
OpenGL3.2
OpenCL1.2
OpenGL ES3.2
OpenVG1.1
Vulkan1.0

Wireless

Antu network-wireless-connected-100.svgWireless Communications
Wi-Fi
WiFi
802.11nYes
Cellular
2G
CSD Yes
GSM Yes
GPRS Yes
EDGE Yes
3G
UMTS
TD-SCDMAYes
DC-HSDPAYes
HSUPAYes
4G
LTE Advanced
E-UTRANYes
UE Cat6

Image

  • Integrated image signal processor supports 21 MP
  • Supports image stabilization
  • Supports video stabilization
  • Supports noise reduction
  • Supports lens shading correction
  • Supports AE/AWB/AF
  • Supports edge enhancement
  • Supports face detection and visual tracking
  • Hardware JPEG encoder

Video

  • HEVC decoder 4k2k @ 30fps
  • H.264 decoder (30fps/40Mbps)
  • Sorenson H.263/H.263 decoder (1080p @ 60fps/40Mbps)
  • MPEG-4 SP/ASP decoder (1080p @ 60fps/40Mbps)
  • DIVX4/DIVX5/DIVX6/DIVX HD/XVID decoder (1080p @ 60fps/40Mbps)
  • VP8 / VC-1 decoders
  • MPEG-4 / H.263 / H.264 / HEVC encoders

Audio

  • Audio content sampling rates 8kHz to 192kHz
  • Audio content sampling format 8-bit/16-bit/24-bit Mono/Stereo
  • I2S, PCM
  • Encode: AMR-NB, AMR-WB, AAC, OGG, ADPCM
  • Decode: WAV, MP3, MP2, AAC, AMR-NB, AMR-WB, MIDI, Vorbis, APE, AAC-plus v1, AAC-plus v2, FLAC, WMA, ADPCM
  • 7.1 channel MHL output

Utilizing devices

  • iMan Victor
  • Blackview BV6000
  • Blackview R7
  • Nomu S30
  • Wolder WIAM #65
  • UMI Super
  • Ulefone Future
  • Oppo R9
  • Elephone P9000
  • Alcatel Flash Plus 2
  • TCL Flash Plus 2
  • Elephone M3
  • Elephone P9000
  • Elephone P9000
  • Elephone P9000
  • Elephone M3

This list is incomplete; you can help by expanding it.

has 2g supporttrue +
has 3g supporttrue +
has 4g supporttrue +
has csd supporttrue +
has dc-hsdpa supporttrue +
has e-utran supporttrue +
has ecc memory supportfalse +
has edge supporttrue +
has gprs supporttrue +
has gsm supporttrue +
has hsupa supporttrue +
has lte advanced supporttrue +
has td-scdma supporttrue +
has umts supporttrue +
integrated gpuMali-T860 +
integrated gpu base frequency700 MHz (0.7 GHz, 700,000 KHz) +
integrated gpu designerARM Holdings +
integrated gpu execution units4 +
l1$ size512 KiB (524,288 B, 0.5 MiB) +
l1d$ description4-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description2-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description16-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
max memory bandwidth6.95 GiB/s (7,116.8 MiB/s, 7.463 GB/s, 7,462.506 MB/s, 0.00679 TiB/s, 0.00746 TB/s) +
max memory channels1 +
supported memory typeLPDDR3-933 +
used byiMan Victor +, Blackview BV6000 +, Blackview R7 +, Nomu S30 +, Wolder WIAM #65 +, UMI Super +, Ulefone Future +, Oppo R9 +, Elephone P9000 +, Alcatel Flash Plus 2 +, TCL Flash Plus 2 + and Elephone M3 +
user equipment category6 +