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Difference between revisions of "amd/duron/dhd1600dlv1c"
< amd‎ | duron

(Created page with "{{amd title|Duron 1600 (Applebred)}} {{mpu | name = Duron 1600 | no image = Yes | image = | image size = | caption...")
 
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| core stepping      = 0
 
| core stepping      = 0
 
| core stepping 2    = 1
 
| core stepping 2    = 1
| core stepping 2     = 2
+
| core stepping 3     = 2
 
| process            = 130 nm
 
| process            = 130 nm
 
| transistors        = 37,200,000
 
| transistors        = 37,200,000
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| socket 0 type      = PGA-462
 
| socket 0 type      = PGA-462
 
}}
 
}}
 +
The '''Duron 1600''' based on the Applebred core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2003. This model was part of the third generation of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} and manufactured using their newer [[130 nm process]], this MPU operated at 1600 MHz with a bus capable of 266 MT/s with a max TDP of 57 W and a typical TDP of 48 W.

Revision as of 12:07, 23 October 2016

Template:mpu The Duron 1600 based on the Applebred core was a 32-bit x86 microprocessor developed by AMD and introduced in mid-2003. This model was part of the third generation of the Duron family. Designed based on AMD's K7 and manufactured using their newer 130 nm process, this MPU operated at 1600 MHz with a bus capable of 266 MT/s with a max TDP of 57 W and a typical TDP of 48 W.