Semiconductor & Computer Engineering
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Difference between revisions of "12-bit architecture"
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== 12-bit microprocessors == | == 12-bit microprocessors == | ||
| − | * [[Intersil | + | * [[Intersil IM6100]] |
| − | * [[ | + | * [[Harris HD-6120]] |
| + | * {{toshiba|TLCS-12}} | ||
| + | |||
| + | == 12-bit systems == | ||
| + | * {{cdc|160|CDC 160}} | ||
| + | * {{cdc|6600|CDC 6600}} | ||
| + | * {{decc|DECmate|DEC DECmate}} | ||
| + | * {{decc|LINC|DEC LINC}} | ||
| + | * {{decc|LINC-8|DEC LINC-8}} | ||
| + | * {{decc|PDP-5|DEC PDP-5}} | ||
| + | * {{decc|PDP-8|DEC PDP-8}} | ||
| + | * {{decc|PDP-12|DEC PDP-12}} | ||
{{stub}} | {{stub}} | ||
[[Category:12-bit microprocessors]] | [[Category:12-bit microprocessors]] | ||
Latest revision as of 13:36, 7 October 2016
The 12-bit architecture is a microprocessor or computer architecture that has a datapath width or a highest operand width of 12 bits or 1.5 octets. These architectures typically have a matching register file with registers width of 12 bits.
12-bit microprocessors[edit]
12-bit systems[edit]
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