From WikiChip
Difference between revisions of "phytium/feiteng/ft-1500a-16"
< phytium‎ | feiteng

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== Cache ==
 
== Cache ==
 
{{cache info
 
{{cache info
−
|l1i cache=512 KB
+
|l1i cache=512 KiB
−
|l1i break=16x32 KB
+
|l1i break=16x32 KiB
 
|l1i extra=(per core)
 
|l1i extra=(per core)
−
|l1d cache=512 KB
+
|l1d cache=512 KiB
−
|l1d break=15x32 KB
+
|l1d break=15x32 KiB
 
|l1d extra=(per core)
 
|l1d extra=(per core)
−
|l2 cache=8 MB
+
|l2 cache=8 MiB
−
|l2 break=16x512 KB
+
|l2 break=16x512 KiB
 
|l3 cache=8 MiB
 
|l3 cache=8 MiB
 
}}
 
}}

Revision as of 23:49, 20 September 2016

Template:mpu FT-1500A/16 is a hexadeca-core 64-bit ARM system on chip developed by Phytium and introduced in 2016. Manufactured on a 28 nm process, the chip operates at 1.5 GHz and dissipates a maximum of 35 W. This chip is designed for server, communication, and infrastructure applications.

Cache

Cache Info [Edit Values]
L1I$ 512 KiB
524,288 B
0.5 MiB
16x32 KiB (per core)
L1D$ 512 KiB
524,288 B
0.5 MiB
15x32 KiB (per core)
L2$ 8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
16x512 KiB
L3$ 8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB

Graphics

This SoC has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR3-1600
Controllers 4
ECC Support No
Max bandwidth 51.2 GB/s

Expansions

Template:mpu expansions

Networking

  • 2x Gigabit Ethernet Interfaces


Networking
10Base-T Yes
100Base-T Yes
1000Base-T Yes

Documents

Datasheet


Retrieved from "https://en.wikichip.org/w/index.php?title=phytium/feiteng/ft-1500a-16&oldid=25611"
Facts about "FT-1500A/16 - Phytium"
RDF feed
l1d$ size512 KiB (524,288 B, 0.5 MiB) +
l1i$ size512 KiB (524,288 B, 0.5 MiB) +
l2$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +