-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Difference between revisions of "amd/k6-2/k6-2-350afr"
Line 32: | Line 32: | ||
| platform = Super 7 | | platform = Super 7 | ||
| chipset = | | chipset = | ||
− | | core name = Chomper | + | | core name = Chomper Extended |
| core family = 5 | | core family = 5 | ||
| core model = 8 | | core model = 8 |
Revision as of 20:06, 3 August 2016
Template:mpu K6-2/350AFR was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1998 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 350 MHz with a FSB of 100 MHz consumed 20 W.