Semiconductor & Computer Engineering
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Difference between revisions of "ambric/am2000/am2045b"
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| frequency = 350 MHz | | frequency = 350 MHz | ||
| bus type = | | bus type = | ||
| − | | bus speed = | + | | bus speed = 100 MHz |
| bus rate = | | bus rate = | ||
| − | | clock multiplier = | + | | clock multiplier = 3.5 |
| microarch = Ambric | | microarch = Ambric | ||
| Line 72: | Line 72: | ||
| socket 0 type = BGA | | socket 0 type = BGA | ||
}} | }} | ||
| + | '''Am2045B''' was [[Ambric]]'s flagship [[MPPA]] introduced in late 2007. This model was made of {{ambric|am2000#Architecture|45 Brics}} arranged as a grid of 5x9, making up a total of 336 {{arch|32}} [[RICS]]-like cores operating asynchronously at 1-350 MHz. This was an enhanced version of the {{\\|Am2045|original}} which featured a higher bandwidth [[network on a chip]] (Ambric claimed up to 40 percent improvement), operated at higher frequency, and provided up to 1.2 trillion operations per seconds theoretical peak computation. This model also had lower power consumption over the original. | ||
Revision as of 15:49, 24 June 2016
Template:mpu Am2045B was Ambric's flagship MPPA introduced in late 2007. This model was made of 45 Brics arranged as a grid of 5x9, making up a total of 336 32-bit RICS-like cores operating asynchronously at 1-350 MHz. This was an enhanced version of the original which featured a higher bandwidth network on a chip (Ambric claimed up to 40 percent improvement), operated at higher frequency, and provided up to 1.2 trillion operations per seconds theoretical peak computation. This model also had lower power consumption over the original.