From WikiChip
Difference between revisions of "amd/am286/n80c286-12"
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| socket 0 type = PLCC | | socket 0 type = PLCC | ||
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+ | '''N80C286-12''' was a member of [[amd|AMD's]] {{amd|Am286}} family specifically designed for embedded applications, likely battery-powered. These chips were remade by AMD in [[static CMOS]] design (as opposed to nMOS), resulting in considerably lower power dissipation. This MPU was rated to operate at 12 MHz and was packaged in a 68-pin Plastic Leadless Chip Carrier package. | ||
+ | |||
+ | == Cache == | ||
+ | {{main|intel/microarchitectures/80286#Memory_Hierarchy|l1=80286 § Cache}} | ||
+ | {{cache info | ||
+ | |l1 cache=0 KB | ||
+ | |l1 break=1x0 KB | ||
+ | |l1 desc= | ||
+ | |l1 extra= | ||
+ | |l2 cache=0 KB | ||
+ | |l2 break=1x0 KB | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This chip had no integrated graphics processing unit. | ||
+ | |||
+ | == Features == | ||
+ | * Protected mode | ||
+ | * Supports FPU coprocessor ({{amd|Am287}}) |
Revision as of 00:21, 24 May 2016
Template:mpu N80C286-12 was a member of AMD's Am286 family specifically designed for embedded applications, likely battery-powered. These chips were remade by AMD in static CMOS design (as opposed to nMOS), resulting in considerably lower power dissipation. This MPU was rated to operate at 12 MHz and was packaged in a 68-pin Plastic Leadless Chip Carrier package.
Cache
- Main article: 80286 § Cache
Cache Info [Edit Values] | ||
L1$ | 0 KB "KB" is not declared as a valid unit of measurement for this property. |
1x0 KB |
L2$ | 0 KB "KB" is not declared as a valid unit of measurement for this property. |
1x0 KB |
Graphics
This chip had no integrated graphics processing unit.
Features
- Protected mode
- Supports FPU coprocessor (Am287)