From WikiChip
Difference between revisions of "intel/core i3/i3-6100u"
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| max res vga = | | max res vga = | ||
| max res vga freq = | | max res vga freq = | ||
+ | |||
+ | | intel quick sync = Yes | ||
+ | | intel intru 3d = Yes | ||
+ | | intel insider = Yes | ||
+ | | intel widi = Yes | ||
+ | | intel fdi = | ||
+ | | intel clear video = Yes | ||
}} | }} | ||
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| uart = | | uart = | ||
| gp io = | | gp io = | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{mpu features | ||
+ | | em64t = Yes | ||
+ | | nx = Yes | ||
+ | | txt = | ||
+ | | tsx = | ||
+ | | vpro = | ||
+ | | ht = Yes | ||
+ | | tbt1 = | ||
+ | | tbt2 = | ||
+ | | bpt = | ||
+ | | vt-x = Yes | ||
+ | | vt-d = Yes | ||
+ | | ept = Yes | ||
+ | | mmx = Yes | ||
+ | | sse = Yes | ||
+ | | sse2 = Yes | ||
+ | | sse3 = Yes | ||
+ | | ssse3 = Yes | ||
+ | | sse4 = Yes | ||
+ | | sse4.1 = Yes | ||
+ | | sse4.2 = Yes | ||
+ | | aes = Yes | ||
+ | | pclmul = Yes | ||
+ | | avx = Yes | ||
+ | | avx2 = Yes | ||
+ | | bmi = Yes | ||
+ | | bmi1 = Yes | ||
+ | | bmi2 = Yes | ||
+ | | f16c = Yes | ||
+ | | fma3 = Yes | ||
+ | | mpx = Yes | ||
+ | | sgx = Yes | ||
+ | | eist = Yes | ||
+ | | secure key = Yes | ||
+ | | os guard = Yes | ||
+ | | intel at = | ||
}} | }} |
Revision as of 13:42, 13 May 2016
Template:mpu Core i3-6100U is a 64-bit dual-core low-end mobile microprocessor introduced by Intel late 2015. This processor, which is based on the Skylake microarchitecture and manufactured in 14 nm process, has a base frequency of 2.3 GHz with a TDP of 15 W with a configurable TDP-down of 7.5 W operating at 800 MHz. This processor incorporates the HD Graphics 520 GPU clocked at 300 MHz with a max frequency of 1 GHz.
Cache
- Main article: Skylake § Cache
Cache Info [Edit Values] | ||
L1I$ | 64 KB "KB" is not declared as a valid unit of measurement for this property. |
2x32 KB 8-way set associative (per core, write-back) |
L1D$ | 64 KB "KB" is not declared as a valid unit of measurement for this property. |
2x32 KB 8-way set associative (per core, write-back) |
L2$ | 512 KB "KB" is not declared as a valid unit of measurement for this property. |
2x256 KB 4-way set associative (per core, write-back) |
L3$ | 3 MB "MB" is not declared as a valid unit of measurement for this property. |
shared |
Graphics
Integrated Graphic Information | |
GPU | Intel HD Graphics 520 |
Device ID | 0x1916 |
Displays | 3 |
Frequency | 300 MHz 0.3 GHz
300,000 KHz |
Max frequency | 1 GHz 1,000 MHz
1,000,000 KHz |
Max memory | 32 GB "GB" is not declared as a valid unit of measurement for this property.
|
Output | DisplayPort, Embedded DisplayPort, HDMI, DVI |
DirectX | 12 |
OpenGL | 4.4 |
OpenCL | 2.0 |
HDMI | 1.4a |
DP | 1.2 |
eDP | 1.3 |
Max HDMI Res | 4096x2304 @24 Hz |
Max DP Res | 4096x2304 @60 Hz |
Max eDP Res | 4096x2304 @60 Hz |
Intel Quick Sync Video | |
Intel InTru 3D | |
Intel Insider | |
Intel WiDi (Wireless Display) | |
Intel Clear Video |
Memory controller
Integrated Memory Controller | |
Type | LPDDR3-1600, LPDDR3-1866, DDR4-1866, DDR4-2133 |
Controllers | 1 |
Channels | 2 |
ECC Support | No |
Max bandwidth | 34,100 MB/s |
Max memory | 32,768 MB |
Expansions
Features
Facts about "Core i3-6100U - Intel"
device id | 0x1916 + |
has feature | integrated gpu + |
integrated gpu | Intel HD Graphics 520 + |
integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
integrated gpu max frequency | 1,000 MHz (1 GHz, 1,000,000 KHz) + |
l1d$ description | 8-way set associative + |
l1i$ description | 8-way set associative + |
l2$ description | 4-way set associative + |
l3$ description | shared + |