From WikiChip
					
    Difference between revisions of "intel/core i3/i3-6100t"    
                	
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| | max res vga        =   | | max res vga        =   | ||
| | max res vga freq   =   | | max res vga freq   =   | ||
| + | |||
| + | | intel quick sync   = Yes | ||
| + | | intel intru 3d     = Yes | ||
| + | | intel insider      = Yes | ||
| + | | intel widi         = Yes | ||
| + | | intel fdi          =  | ||
| + | | intel clear video  = Yes | ||
| }} | }} | ||
| Line 139: | Line 146: | ||
| | uart               =   | | uart               =   | ||
| | gp io              =   | | gp io              =   | ||
| + | }} | ||
| + | |||
| + | == Features ==  | ||
| + | {{mpu features | ||
| + | | em64t       = Yes | ||
| + | | nx          = Yes | ||
| + | | txt         =  | ||
| + | | tsx         =  | ||
| + | | vpro        =  | ||
| + | | ht          = Yes | ||
| + | | tbt1        = | ||
| + | | tbt2        =  | ||
| + | | bpt         =  | ||
| + | | vt-x        = Yes | ||
| + | | vt-d        = Yes | ||
| + | | ept         = Yes | ||
| + | | mmx         = Yes | ||
| + | | sse         = Yes | ||
| + | | sse2        = Yes | ||
| + | | sse3        = Yes | ||
| + | | ssse3       = Yes | ||
| + | | sse4        = Yes | ||
| + | | sse4.1      = Yes | ||
| + | | sse4.2      = Yes | ||
| + | | aes         = Yes | ||
| + | | pclmul      = Yes | ||
| + | | avx         = Yes | ||
| + | | avx2        = Yes | ||
| + | | bmi         = Yes | ||
| + | | bmi1        = Yes | ||
| + | | bmi2        = Yes | ||
| + | | f16c        = Yes | ||
| + | | fma3        = Yes | ||
| + | | mpx         = Yes | ||
| + | | sgx         = Yes | ||
| + | | eist        = Yes | ||
| + | | secure key  = Yes | ||
| + | | os guard    = Yes | ||
| + | | intel at    =  | ||
| }} | }} | ||
Revision as of 14:42, 13 May 2016
Template:mpu Core i3-6100T is a 64-bit dual-core low-end desktop microprocessor introduced by Intel late 2015. This processor, which is based on the Skylake microarchitecture and manufactured in 14 nm process, has a base frequency of 3.2 GHz with a TDP of 35 W. This processor incorporates the HD Graphics 530 GPU clocked at 350 MHz with a max frequency of 950 MHz.
Cache
- Main article: Skylake § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 64 KB "KB" is not declared as a valid unit of measurement for this property. | 2x32 KB 8-way set associative (per core, write-back) | 
| L1D$ | 64 KB "KB" is not declared as a valid unit of measurement for this property. | 2x32 KB 8-way set associative (per core, write-back) | 
| L2$ | 512 KB "KB" is not declared as a valid unit of measurement for this property. | 2x256 KB 4-way set associative (per core, write-back) | 
| L3$ | 3 MB "MB" is not declared as a valid unit of measurement for this property. | shared | 
Graphics
| Integrated Graphic Information | |
| GPU | Intel HD Graphics 530 | 
| Device ID | 0x1912 | 
| Displays | 3 | 
| Frequency | 350 MHz 0.35 GHz  350,000 KHz | 
| Max frequency | 950 MHz 0.95 GHz  950,000 KHz | 
| Max memory | 64 GB "GB" is not declared as a valid unit of measurement for this property. | 
| Output | DisplayPort, Embedded DisplayPort, HDMI, DVI | 
| DirectX | 12 | 
| OpenGL | 4.4 | 
| OpenCL | 2.0 | 
| HDMI | 1.4a | 
| DP | 1.2 | 
| eDP | 1.3 | 
| Max HDMI Res | 4096x2304 @24 Hz | 
| Max DP Res | 4096x2304 @60 Hz | 
| Max eDP Res | 4096x2304 @60 Hz | 
| Intel Quick Sync Video | |
| Intel InTru 3D | |
| Intel Insider | |
| Intel WiDi (Wireless Display) | |
| Intel Clear Video | |
Memory controller
| Integrated Memory Controller | |
| Type | DDR3L-1333, DDR3L-1600, DDR4-1866, DDR4-2133 | 
| Controllers | 1 | 
| Channels | 2 | 
| ECC Support | Yes | 
| Max bandwidth | 34.1 GB/s | 
| Max memory | 64 GB | 
Expansions
Features
Facts about "Core i3-6100T  - Intel"
| device id | 0x1912 + | 
| has feature | integrated gpu + | 
| integrated gpu | Intel HD Graphics 530 + | 
| integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + | 
| integrated gpu max frequency | 950 MHz (0.95 GHz, 950,000 KHz) + | 
| l1d$ description | 8-way set associative + | 
| l1i$ description | 8-way set associative + | 
| l2$ description | 4-way set associative + | 
| l3$ description | shared + |