From WikiChip
Difference between revisions of "intel/xeon e3/e3-1270 v5"
< intel

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== Graphics ==
 
== Graphics ==
 
This chip has no integrated graphics processing unit.
 
This chip has no integrated graphics processing unit.
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 +
== Memory controller ==
 +
{{integrated memory controller
 +
| type              = DDR3L-1333
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| type 2            = DDR3L-1600
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| type 3            = DDR3L-RS1333
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| type 4            = DDR3L-RS1600
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| type 5            = DDR4-1866
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| type 6            = DDR4-2133
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| type 7            = DDR4-RS1866
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| type 8            = DDR4-RS2133
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| controllers        = 1
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| channels          = 2
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| ecc support        = Yes
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| max bandwidth      = 34.1 GB/s
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| bandwidth schan    =
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| bandwidth dchan    =
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| max memory        = 64 GB
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}}

Revision as of 11:02, 4 May 2016

Template:mpu The Xeon E3-1270 V5 is an entry-level workstations and servers 64-bit x86 quad-core microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 3.6 GHz with turbo boost of 4 GHz. The E3-1270 V5 has a TDP of 80 Watts and supports up to 64 GB of dual-channel DDR3/4. This MPU has no integrated graphics processor.

Cache

Main article: Skylake § Cache
Cache Info [Edit Values]
L1I$ 128 KB
"KB" is not declared as a valid unit of measurement for this property.
4x32 KB 8-way set associative (per core, write-back)
L1D$ 128 KB
"KB" is not declared as a valid unit of measurement for this property.
4x32 KB 8-way set associative (per core, write-back)
L2$ 1 MB
"MB" is not declared as a valid unit of measurement for this property.
4x256 KB 4-way set associative (per core)
L3$ 8 MB
"MB" is not declared as a valid unit of measurement for this property.
4x2 MB

Graphics

This chip has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR3L-1333, DDR3L-1600, DDR3L-RS1333, DDR3L-RS1600, DDR4-1866, DDR4-2133, DDR4-RS1866, DDR4-RS2133
Controllers 1
Channels 2
ECC Support Yes
Max bandwidth 34.1 GB/s
Max memory 64 GB
l1d$ description8-way set associative +
l1i$ description8-way set associative +
l2$ description4-way set associative +