From WikiChip
Difference between revisions of "intel/xeon e3/e3-1235l v5"
< intel

Line 72: Line 72:
 
}}
 
}}
 
The '''Xeon E3-1235L V5''' is an entry-level workstations and servers {{arch|64}} [[x86]] quad-core microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 2 GHz with turbo boost of 3 GHz. The E3-1235L V5 has a TDP of 25 Watts and supports up to 64 GB of dual-channel DDR3/4. This MPU has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]].
 
The '''Xeon E3-1235L V5''' is an entry-level workstations and servers {{arch|64}} [[x86]] quad-core microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 2 GHz with turbo boost of 3 GHz. The E3-1235L V5 has a TDP of 25 Watts and supports up to 64 GB of dual-channel DDR3/4. This MPU has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]].
 +
 +
== Cache ==
 +
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 +
{{cache info
 +
|l1i cache=128 KB
 +
|l1i break=4x32 KB
 +
|l1i desc=8-way set associative
 +
|l1i extra=(per core, write-back)
 +
|l1d cache=128 KB
 +
|l1d break=4x32 KB
 +
|l1d desc=8-way set associative
 +
|l1d extra=(per core, write-back)
 +
|l2 cache=1 MB
 +
|l2 break=4x256 KB
 +
|l2 desc=4-way set associative
 +
|l2 extra=(per core)
 +
|l3 cache=8 MB
 +
|l3 break=4x2 MB
 +
|l3 desc=
 +
|l3 extra=
 +
}}

Revision as of 09:47, 4 May 2016

Template:mpu The Xeon E3-1235L V5 is an entry-level workstations and servers 64-bit x86 quad-core microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 2 GHz with turbo boost of 3 GHz. The E3-1235L V5 has a TDP of 25 Watts and supports up to 64 GB of dual-channel DDR3/4. This MPU has the HD Graphics P530 IGP.

Cache

Main article: Skylake § Cache
Cache Info [Edit Values]
L1I$ 128 KB
"KB" is not declared as a valid unit of measurement for this property.
 		4x32 KB 8-way set associative (per core, write-back)
L1D$ 128 KB
"KB" is not declared as a valid unit of measurement for this property.
 		4x32 KB 8-way set associative (per core, write-back)
L2$ 1 MB
"MB" is not declared as a valid unit of measurement for this property.
 		4x256 KB 4-way set associative (per core)
L3$ 8 MB
"MB" is not declared as a valid unit of measurement for this property.
 		4x2 MB
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e3/e3-1235l_v5&oldid=17810"
Facts about "Xeon E3-1235L v5 - Intel"
RDF feed
l1d$ description8-way set associative +
l1i$ description8-way set associative +
l2$ description4-way set associative +