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(Created page with "'''Static CMOS''' is a circuit component or a gate in which its output is always connected to a either V<sub>cc</sub> or GND. == Overview == A ...")
 
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'''Static [[CMOS]]''' is a circuit component or a [[logic gate|gate]] in which its output is always connected to a either [[VCC|V<sub>cc</sub>]] or [[GND]].
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'''Static [[CMOS]]''' is a [[logic gate|logic]] circuit design technique whereby the output is always strongly driven due to it always being connected to either [[VCC|V<sub>cc</sub>]] or [[GND]].
  
 
== Overview ==
 
== Overview ==

Revision as of 03:24, 28 February 2014

Static CMOS is a logic circuit design technique whereby the output is always strongly driven due to it always being connected to either Vcc or GND.

Overview

A static CMOS circuit is composed of two networks:

  • pull-up network (PUN) - a set of PMOS transistors connected between Vcc and the output line
  • pull-down network (PDN) - a set of NMOS transistors connected between GND and the output line

Components designed out pull-up and pull-down networks operate in a mutually exclusive way; in a steady state there is never a direct path between Vcc and GND. Devices that are made up of PUN/PDN are always strongly driven and therefore office strong immunity from noise.

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