From WikiChip
Difference between revisions of "gate universality"
m |
|||
Line 1: | Line 1: | ||
− | '''Gate universality''' is a concept that refers to individual [[logic gates]], primarily [[NAND]] and [[NOR]], being | + | '''Gate universality''' is a concept that refers to individual [[logic gates]], primarily [[NAND]] and [[NOR]], being {{ba|functionally complete}}. |
In [[CMOS]], converting complex logic functions into [[NAND logic|NAND]] and [[NOR logic|NOR]]-based logic can sometimes allow additional optimizations by removing redundant sets of [[pMOS transistor|pMOS]] and [[nMOS transistor|nMOS]] pairs of [[transistor]]s. | In [[CMOS]], converting complex logic functions into [[NAND logic|NAND]] and [[NOR logic|NOR]]-based logic can sometimes allow additional optimizations by removing redundant sets of [[pMOS transistor|pMOS]] and [[nMOS transistor|nMOS]] pairs of [[transistor]]s. |
Latest revision as of 23:34, 7 December 2015
Gate universality is a concept that refers to individual logic gates, primarily NAND and NOR, being functionally complete.
In CMOS, converting complex logic functions into NAND and NOR-based logic can sometimes allow additional optimizations by removing redundant sets of pMOS and nMOS pairs of transistors.
Gate | Boolean function | NAND logic | NOR logic |
---|---|---|---|
NOT | |||
AND | |||
OR |
This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information. |