Information for "renesas/r-car/v2h"

Basic information

Display title	R-Car V2H - Renesas
Default sort key	R-Car V2H, Intel
Page length (in bytes)	2,479
Page ID	21371
Page content language	English (en)
Page content model	wikitext
Indexing by robots	Allowed
Number of redirects to this page	6
Counted as a content page	Yes
Number of subpages of this page	0 (0 redirects; 0 non-redirects)

Edit	Allow all users (infinite)
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Page creator	BCD (talk \| contribs)
Date of page creation	01:37, 23 July 2017
Latest editor	ChippyBot (talk \| contribs)
Date of latest edit	15:32, 13 December 2017
Total number of edits	10
Total number of distinct authors	2
Recent number of edits (within past 90 days)	0
Recent number of distinct authors	0

Transcluded templates (17)	Templates used on this page: Template:arch (view source) (protected) Template:arm features (edit) Template:armh (edit) Template:cache size (view source) (protected) Template:chip (view source) (protected) Template:imgtec (edit) Template:integrated graphics (edit) Template:istrue (view source) (protected) Template:link-armh (edit) Template:link-imagination technologies (edit) Template:main (view source) (protected) Template:memory controller (edit) Template:packages/renesas/fcbga-64 (edit) Template:renesas title (edit) Template:url parse anchor (view source) (protected) Template:url parse article (view source) (protected) Module:chip (view source)

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	R-Car V2H - Renesas#package +
base frequency	1,000 MHz (1 GHz, 1,000,000 kHz) +
core count	2 +
core name	Cortex-A15 +
core voltage	1.03 V (10.3 dV, 103 cV, 1,030 mV) +
designer	Renesas + and ARM Holdings +
family	R-Car +
first announced	August 28, 2014 +
first launched	October 2016 +
full page name	renesas/r-car/v2h +
has ecc memory support	true +
instance of	microprocessor +
integrated gpu	PowerVR SGX531 +
integrated gpu designer	Imagination Technologies +
io voltage	3.3 V (33 dV, 330 cV, 3,300 mV) +
isa	ARMv8 +
isa family	ARM +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldate	October 2016 +
main image	+
manufacturer	TSMC +
market segment	Embedded +
max cpu count	1 +
max memory bandwidth	5.96 GiB/s (6,103.04 MiB/s, 6.4 GB/s, 6,399.501 MB/s, 0.00582 TiB/s, 0.0064 TB/s) +
max memory channels	1 +
microarchitecture	Cortex-A15 +
model number	V2H +
name	R-Car V2H +
package	FCBGA-64 +
part number	R8A7792 +
process	28 nm (0.028 μm, 2.8e-5 mm) +
series	2nd Gen +
smp max ways	1 +
supported memory type	DDR3-1600 +
technology	CMOS +
thread count	2 +
word size	64 bit (8 octets, 16 nibbles) +