From WikiChip
Information for "dec/microarchitectures/alpha 21164"
Basic information
Display title | Alpha 21164 - Microarchitectures - DEC |
Default sort key | dec/microarchitectures/alpha 21164 |
Page length (in bytes) | 1,667 |
Page ID | 18539 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 1 |
Counted as a content page | Yes |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | ChipIt (talk | contribs) |
Date of page creation | 07:01, 13 June 2017 |
Latest editor | 208.66.214.133 (talk) |
Date of latest edit | 10:52, 27 November 2020 |
Total number of edits | 5 |
Total number of distinct authors | 2 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Page properties
Transcluded templates (9) | Templates used on this page:
|
Facts about "Alpha 21164 - Microarchitectures - DEC"
codename | Alpha 21164 + |
core count | 1 + |
designer | DEC + |
first launched | January 1995 + |
full page name | dec/microarchitectures/alpha 21164 + |
instance of | microarchitecture + |
instruction set architecture | Alpha + |
manufacturer | DEC + and Samsung + |
microarchitecture type | CPU + |
name | Alpha 21164 + |
pipeline stages (max) | 12 + |
pipeline stages (min) | 7 + |
process | 500 nm (0.5 μm, 5.0e-4 mm) + |