Semiconductor & Computer Engineering
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Information for "cavium/octeon"
Basic information
| Display title | OCTEON - Cavium |
| Default sort key | OCTEON, Cavium |
| Page length (in bytes) | 10,946 |
| Page ID | 11977 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 4 |
| Counted as a content page | Yes |
| Number of subpages of this page | 89 (0 redirects; 89 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | ChipIt (talk | contribs) |
| Date of page creation | 15:04, 7 December 2016 |
| Latest editor | 213.164.80.74 (talk) |
| Date of latest edit | 08:25, 30 December 2020 |
| Total number of edits | 25 |
| Total number of distinct authors | 2 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (15) | Templates used on this page:
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Facts about "OCTEON - Cavium"
| designer | Cavium + |
| first announced | September 13, 2004 + |
| first launched | June 1, 2005 + |
| full page name | cavium/octeon + |
| instance of | system on a chip family + |
| instruction set architecture | MIPS64 + |
| main designer | Cavium + |
| manufacturer | TSMC + |
| microarchitecture | cnMIPS + |
| name | Cavium OCTEON + |
| package | FCBGA-1521 + and HSBGA-868 + |
| process | 130 nm (0.13 μm, 1.3e-4 mm) + |
| socket | BGA-1521 + and BGA-868 + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |