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|designer=Intel | |designer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
− | |introduction= | + | |introduction=2019 |
− | |process=14 nm | + | |process=14 nm |
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|type=Superscalar | |type=Superscalar | ||
|oooe=Yes | |oooe=Yes | ||
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|l1d per=core | |l1d per=core | ||
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
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|l2=1 MiB | |l2=1 MiB | ||
− | |l2 per= | + | |l2 per=core |
|l2 desc=16-way set associative | |l2 desc=16-way set associative | ||
|l3=1.375 MiB | |l3=1.375 MiB | ||
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|predecessor=Cascade Lake | |predecessor=Cascade Lake | ||
|predecessor link=intel/microarchitectures/cascade lake | |predecessor link=intel/microarchitectures/cascade lake | ||
− | |successor | + | |successor=Ice Lake (Server) |
− | + | |successor link=intel/microarchitectures/ice lake (server) | |
− | + | |contemporary=Coffee Lake | |
− | | | + | |contemporary link=intel/microarchitectures/coffee lake |
− | |contemporary | ||
− | |contemporary | ||
}} | }} | ||
− | '''Cooper Lake''' ('''CPL | + | '''Cooper Lake''' ('''CPL''') is [[Intel]]'s successor to {{\\|Cascade Lake}}, a [[14 nm]] [[microarchitecture]] for enthusiasts and servers. |
− | + | For desktop enthusiasts, Cascade Lake is branded {{intel|Core i7}}, and {{intel|Core i9}} processors (under the {{intel|Core X}} series). For scalable server class processors, Intel branded it as {{intel|Xeon Bronze}}, {{intel|Xeon Silver}}, {{intel|Xeon Gold}}, and {{intel|Xeon Platinum}}. | |
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== Codenames == | == Codenames == | ||
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{| class="wikitable" | {| class="wikitable" | ||
|- | |- | ||
! Core !! Abbrev !! Target | ! Core !! Abbrev !! Target | ||
− | |- | + | |- |
| {{intel|Cooper Lake X|l=core}} || CPL-X || High-end desktops & enthusiasts market | | {{intel|Cooper Lake X|l=core}} || CPL-X || High-end desktops & enthusiasts market | ||
− | |- | + | |- |
| {{intel|Cooper Lake W|l=core}} || CPL-W || Enterprise/Business workstations | | {{intel|Cooper Lake W|l=core}} || CPL-W || Enterprise/Business workstations | ||
|- | |- | ||
| {{intel|Cooper Lake SP|l=core}} || CPL-SP || Server Scalable Processors | | {{intel|Cooper Lake SP|l=core}} || CPL-SP || Server Scalable Processors | ||
− | |- | + | |- |
| {{intel|Cooper Lake AP|l=core}} || CPL-AP || Server Advanced Processors | | {{intel|Cooper Lake AP|l=core}} || CPL-AP || Server Advanced Processors | ||
|} | |} | ||
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== Release Dates == | == Release Dates == | ||
[[File:intel-2019-investor-meeting-ice-lake-server-cooper-roadmap.png|right|thumb|Cooper Lake and {{\\|Ice Lake}} roadmap.]] | [[File:intel-2019-investor-meeting-ice-lake-server-cooper-roadmap.png|right|thumb|Cooper Lake and {{\\|Ice Lake}} roadmap.]] | ||
− | Cooper | + | Cooper Lake is expected to be released in the first half of 2020. |
== Process Technology == | == Process Technology == | ||
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== Architecture == | == Architecture == | ||
+ | Cooper Lake is based on the {{intel|Whitley|l=platform}} platform. | ||
=== Key changes from {{\\|Cascade Lake}} === | === Key changes from {{\\|Cascade Lake}} === | ||
* SoC | * SoC | ||
− | ** | + | ** Higher core count (??, up from [[28 cores|28]]) |
− | + | * I/O | |
+ | ** PCIe 4.0 (from PCIe 3.0) | ||
* Memory | * Memory | ||
− | ** Higher | + | ** Higher bandwidth (174.84 GiB/s, up from 119.209 GiB/s) |
+ | ** Octa-channel (up from hexa-channel) | ||
** Optane DC DIMMs | ** Optane DC DIMMs | ||
*** Apache Pass '''→''' Barlow Pass | *** Apache Pass '''→''' Barlow Pass | ||
− | |||
* Platform | * Platform | ||
− | ** {{intel|Purley|l=platform}} '''→''' {{intel| | + | ** {{intel|Purley|l=platform}} '''→''' {{intel|Whitley|l=platform}} |
− | |||
* Packaging | * Packaging | ||
− | + | ** 4189-contact flip-chip LGA (up from 3647 contacts) | |
− | |||
{{expand list}} | {{expand list}} | ||
Facts about "Cooper Lake - Microarchitectures - Intel"
codename | Cooper Lake + |
core count | 28 +, 24 +, 20 +, 18 +, 16 + and 8 + |
designer | Intel + |
first launched | June 18, 2020 + |
full page name | intel/microarchitectures/cooper lake + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Cooper Lake + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |