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|name=Cooper Lake | |name=Cooper Lake | ||
|designer=Intel | |designer=Intel | ||
+ | |designer 2=Safari | ||
|manufacturer=Intel | |manufacturer=Intel | ||
|introduction=June 18, 2020 | |introduction=June 18, 2020 | ||
− | |process=14 nm | + | |process=14 nm |
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|type=Superscalar | |type=Superscalar | ||
− | |oooe= | + | |oooe=No |
− | |speculative= | + | |speculative=No |
− | |renaming= | + | |renaming=No |
|stages min=14 | |stages min=14 | ||
|stages max=19 | |stages max=19 | ||
Line 53: | Line 48: | ||
|l1i=32 KiB | |l1i=32 KiB | ||
|l1i per=core | |l1i per=core | ||
− | |l1i desc= | + | |l1i desc=2 |
− | |l1d= | + | |l1d=0 |
− | |l1d per= | + | |l1d per=Fuck |
− | |l1d desc= | + | |l1d desc=1 |
− | + | |l2=2 | |
− | + | |l2 per=4 | |
− | |l2= | + | |l2 desc=4 |
− | |l2 per= | + | |l3=3 |
− | |l2 desc= | + | |l3 per=0 |
− | |l3= | + | |l3 desc=1 |
− | |l3 per= | ||
− | |l3 desc= | ||
|core name=Cooper Lake X | |core name=Cooper Lake X | ||
|core name 2=Cooper Lake SP | |core name 2=Cooper Lake SP | ||
|core name 3=Cooper Lake AP | |core name 3=Cooper Lake AP | ||
− | | | + | |core name 4=Aaron |
+ | |core name 5=Aaron | ||
+ | |core name 6=Aaron | ||
+ | |core name 7=Aaron | ||
+ | |core name 8=Aaron | ||
+ | |core name 9=Aaron | ||
|predecessor link=intel/microarchitectures/cascade lake | |predecessor link=intel/microarchitectures/cascade lake | ||
− | |successor | + | |successor=Ice Lake (Server) |
− | + | |successor link=intel/microarchitectures/ice lake (server) | |
− | + | |contemporary=Coffee Lake | |
− | | | + | |contemporary link=intel/microarchitectures/coffee lake |
− | |contemporary | ||
− | |contemporary | ||
}} | }} | ||
'''Cooper Lake''' ('''CPL''' / '''CPX''') is [[Intel]]'s successor to {{\\|Cascade Lake}}, a [[14 nm]] [[microarchitecture]] for the multiprocessing server market only. | '''Cooper Lake''' ('''CPL''' / '''CPX''') is [[Intel]]'s successor to {{\\|Cascade Lake}}, a [[14 nm]] [[microarchitecture]] for the multiprocessing server market only. |
Facts about "Cooper Lake - Microarchitectures - Intel"
codename | Cooper Lake + |
core count | 28 +, 24 +, 20 +, 18 +, 16 + and 8 + |
designer | Intel + |
first launched | June 18, 2020 + |
full page name | intel/microarchitectures/cooper lake + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Cooper Lake + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |