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Latest revision | Your text | ||
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| developer 2 = Datapoint Corporation | | developer 2 = Datapoint Corporation | ||
| implementation = 8008 | | implementation = 8008 | ||
− | | dev model = | + | | dev model = proprietary |
− | | design = Von Neumann | + | | design = Von Neumann architecture |
| data size = 8 bit | | data size = 8 bit | ||
| inst size = 8 bit | | inst size = 8 bit | ||
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| introduction = 1972 | | introduction = 1972 | ||
| version = 1 | | version = 1 | ||
− | | format = | + | | format = register-register |
− | | endianness = | + | | endianness = bi-endian |
− | | registers = | + | | registers = 0 |
| gprs = 7 | | gprs = 7 | ||
| gprs info = scratchpad | | gprs info = scratchpad | ||
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* [[#machine|Machine Instructions]] | * [[#machine|Machine Instructions]] | ||
− | In 1972, Intel | + | In 1972, Intel introduce their first set of mnemonics for their instructions. This original set consists of three characters which meant it could easily be encoded into a lookup table. A few years later, when they released their {{intel|8080}} and its instruction set, they also revamped the 8008 mnemonics to match the 8080's ones more closely. The newer mnemonics resemble a primitive version of modern x86 mnemonics. Since 8008 programs can be found using bother mnemonics, both the "old" and the "new" mnemonics are listed below. Both mnemonics results in identical binary values. |
{{isa | {{isa | ||
| title = 8008 ISA | | title = 8008 ISA | ||
| mn title = Mnemonic (old) | | mn title = Mnemonic (old) | ||
− | | Mnemonic (new) | + | | col 1 = Mnemonic (new) |
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| listing = | | listing = | ||
− | {{inst|cols= | + | {{inst|cols=4|section=<span id="index_register">'''Index Register Instructions'''</span><br><small>Load instructions do not affect any flag. The Inc and Dec instructions affect all flags except carry.</small>}} |
− | {{inst|mn=LR<sub>d</sub>R<sub>s</sub> |col 1=MOV R<sub>d</sub>, R<sub>s</sub> | + | {{inst|mn=LR<sub>d</sub>R<sub>s</sub> |col 1=MOV R<sub>d</sub>, R<sub>s</sub> |op={{bin|11 DDD SSS}} |act=R<sub>d</sub> = R<sub>s</sub>}} |
− | {{inst|mn=LR<sub>d</sub>M |col 1=MOV R<sub>d</sub>, M | + | {{inst|mn=LR<sub>d</sub>M |col 1=MOV R<sub>d</sub>, M |op={{bin|11 DDD 111}} |act=R<sub>d</sub> = Mem}} |
− | {{inst|mn=LMR<sub>s</sub> |col 1=MOV | + | {{inst|mn=LMR<sub>s</sub> |col 1=MOV R<sub>s</sub>, M |op={{bin|11 111 SSS}} |act=Mem = R<sub>s</sub>}} |
− | {{inst|mn=LR<sub>d</sub>I |col 1=MVI R<sub>d</sub>, Imm | + | {{inst|mn=LR<sub>d</sub>I |col 1=MVI R<sub>d</sub>, Imm |op={{bin|00 DDD 110}}<br>{{bin|BB BBB BBB}} |act=R<sub>d</sub> = B<sub>7</sub>...B<sub>0</sub>}} |
− | {{inst|mn=LMI | + | {{inst|mn=LMI |col 1=MVI M, Imm |op={{bin|00 111 110}}<br>{{bin|BB BBB BBB}} |act=Mem = B<sub>7</sub>...B<sub>0</sub>}} |
− | {{inst|mn=INR<sub>d</sub> |col 1=INR R<sub>d</sub> | + | {{inst|mn=INR<sub>d</sub> |col 1=INR R<sub>d</sub> |op={{bin|00 DDD 000}} |act=R<sub>d</sub> = R<sub>d</sub> + 1 ({{l|neq|R<sub>d</sub>|A}})}} |
− | {{inst|mn=DCR<sub>d</sub> |col 1=DCR R<sub>d</sub> | + | {{inst|mn=DCR<sub>d</sub> |col 1=DCR R<sub>d</sub> |op={{bin|00 DDD 001}} |act=R<sub>d</sub> = R<sub>d</sub> - 1 ({{l|neq|R<sub>d</sub>|A}})}} |
− | {{inst|cols= | + | {{inst|cols=4|section=<span id="accumulator_group">'''Accumulator Group Instructions'''</span><br><small>The result of an ALU instruction affect all flags. The rotation instructions only affect the carry flag.</small>}} |
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− | {{inst|cols= | + | {{inst|cols=4|section=<span id="pc_and_stack">'''Program Counter and Stack Control Instructions'''</span>}} |
− | {{inst|mn=JMP |col 1=JMP | + | {{inst|mn=JMP |col 1=JMP |op={{bin|01 XXX 100}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=Unconditional Jump to B<sub>13</sub>...B<sub>0</sub>}} |
− | + | {{inst|mn=JFC |col 1=JNC |op={{bin|01 000 000}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If carry = 0, jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | + | {{inst|mn=JFZ |col 1=JNZ |op={{bin|01 001 000}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If {{l|neq|result|0}}, jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | + | {{inst|mn=JFS |col 1=JP |op={{bin|01 010 000}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If sign = 0 (positive), jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | + | {{inst|mn=JFP |col 1=JPO |op={{bin|01 011 000}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If parity = 0 (odd), jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | + | {{inst|mn=JC |col 1=JC |op={{bin|01 100 000}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If carry = 1, jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | + | {{inst|mn=JZ |col 1=JZ |op={{bin|01 101 000}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If result = 0, jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | + | {{inst|mn=JS |col 1=JM |op={{bin|01 110 000}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If sign = 1 (negative), jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | + | {{inst|mn=JP |col 1=JPE |op={{bin|01 111 000}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If parity = 1 (even), jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | {{inst|mn= | + | {{inst|mn=CAL |col 1=CALL |op={{bin|01 XXX 110}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=Save current address onto the stack and jump to B<sub>13</sub>...B<sub>0</sub>}} |
− | + | {{inst|mn=CFC |col 1=CNC |op={{bin|01 000 010}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If carry = 0, save current address and jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | + | {{inst|mn=CFZ |col 1=CNZ |op={{bin|01 001 010}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If {{l|neq|result|0}}, save current address and jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | + | {{inst|mn=CFS |col 1=CP |op={{bin|01 010 010}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If sign = 0 (positive), save current address and jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | + | {{inst|mn=CFP |col 1=CPO |op={{bin|01 011 010}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If parity = 0 (odd), save current address and jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | {{inst|mn= | + | {{inst|mn=CC |col 1=CC |op={{bin|01 100 010}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If carry = 1, save current address and jump to B<sub>13</sub>...B<sub>0</sub>}} |
− | + | {{inst|mn=CZ |col 1=CZ |op={{bin|01 101 010}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If result = 0, save current address and jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | + | {{inst|mn=CS |col 1=CM |op={{bin|01 110 010}}<br>B<sub>7</sub> B<sub>6</sub> B<sub>5</sub> B<sub>4</sub> B<sub>3</sub> B<sub>2</sub> B<sub>1</sub> B<sub>0</sub><br>X<sub>15</sub> X<sub>14</sub> B<sub>13</sub> B<sub>12</sub> B<sub>11</sub> B<sub>10</sub> B<sub>9</sub> B<sub>8</sub> |act=If sign = 1 (negative), save current address and jump to B<sub>13</sub>...B<sub>0</sub>}} | |
− | {{inst|mn= | + | {{inst|mn=CP |col 1=CPE |op={{bin|01 111 010}}<br>B<sub>7</sub>B<sub>6</sub> B<sub>5</sub>B<sub>4</sub>B<sub>3</sub> B<sub>2</sub>B<sub>1</sub>B<sub>0</sub><br>X<sub>15</sub>X<sub>14</sub> B<sub>13</sub>B<sub>12</sub>B<sub>11</sub> B<sub>10</sub>B<sub>9</sub>B<sub>8</sub> |act=If parity = 1 (even), save current address and jump to B<sub>13</sub>...B<sub>0</sub>}} |
− | + | {{inst|mn=RET |col 1=RET |op={{bin|00 XXX 111}}|act=Unconditionally return, down one stack level}} | |
− | + | {{inst|mn=RFC |col 1=RNC |op={{bin|00 000 011}}|act=If carry = 0, return, down one stack level}} | |
− | {{inst|mn= | + | {{inst|mn=RFZ |col 1=RNZ |op={{bin|00 001 011}}|act=If {{l|neq|result|0}}, return, down one stack level}} |
− | + | {{inst|mn=RFS |col 1=RP |op={{bin|00 010 011}}|act=If sign = 0 (positive), return, down one stack level}} | |
− | + | {{inst|mn=RFP |col 1=RPO |op={{bin|00 011 011}}|act=If parity = 0 (odd), return, down one stack level}} | |
− | {{ | + | {{inst|mn=RC |col 1=RC |op={{bin|00 100 011}}|act=If carry = 1, return, down one stack level}} |
− | + | {{inst|mn=RZ |col 1=RZ |op={{bin|00 101 011}}|act=If result = 0, return, down one stack level}} | |
− | + | {{inst|mn=RS |col 1=RM |op={{bin|00 110 011}}|act=If sign = 1 (negative), return, down one stack level}} | |
− | + | {{inst|mn=RP |col 1=RPE |op={{bin|00 111 011}}|act=If parity = 1 (even), return, down one stack level}} | |
− | + | {{inst|mn=RST |col 1=RST |op={{bin|00 AAA 101}}|act=Call the subroutine at memory AAA000 (up one stack level)}} | |
− | + | {{inst|cols=4|section=<span id="io">'''Input/Output Instructions'''</span>}} | |
− | + | {{inst|mn=INP |col 1=IN |op={{bin|01 00M MM1}} |act=A = PORT[MMM]}} | |
− | {{ | + | {{inst|mn=OUT |col 1=OUT |op={{bin|01 RRM MM1}} |act=PORT[RRMMM] = A ({{l|neq|RR|00}})}} |
− | + | {{inst|cols=4|section=<span id="machine">'''Machine Instructions'''</span>}} | |
− | + | {{inst|mn=HLT |col 1=HLT |op={{bin|00 000 00{{X}}}} |act=Enter STOPPED state; remain there until interupted}} | |
− | {{ | + | {{inst|mn=HLT |col 1=HLT |op={{bin|11 111 111}} |act=Enter STOPPED state; remain there until interupted}} |
− | |||
− | {{inst|mn=HLT |col 1=HLT | ||
}} | }} | ||
Facts about "8008 ISA - Intel"
designer | Intel + and Datapoint Corporation + |
first launched | 1972 + |
full page name | intel/mcs-8/isa + |
implementation | 8008 - Intel + |
instance of | instruction set architecture + |
instruction count | 48 + |
instruction word size | 8 bit (1 octets) + |
name | 8008 + |
word size | 8 bit (1 octets, 2 nibbles) + |