From WikiChip
Editing intel/loihi 2

Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.

This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.

Latest revision Your text
Line 2: Line 2:
 
{{chip
 
{{chip
 
|chip type=neuromorphic chip
 
|chip type=neuromorphic chip
 +
|no image=yes
 
|name=Loihi 2
 
|name=Loihi 2
|image=File:intel loihi 2 chip.png
 
 
|designer=Intel
 
|designer=Intel
 
|manufacturer=Intel
 
|manufacturer=Intel
Line 18: Line 18:
 
|predecessor=Loihi
 
|predecessor=Loihi
 
|predecessor link=intel/loihi
 
|predecessor link=intel/loihi
|neuron count=1,048,576
+
|neuron count=1,000,000
 
|synapse count=120,000,000
 
|synapse count=120,000,000
 
}}
 
}}
 
'''Loihi 2''' (pronounced low-ee-hee 2) is the successor to {{\\|Loihi}}, a second-generation neuromorphic research test chip designed by Intel Labs that was introduced in late 2021. The chip uses an asynchronous spiking neural network (SNN) to implement adaptive self-modifying event-driven fine-grained parallel computations used to implement learning and inference with high efficiency. The chip is a 128-neuromorphic cores many-core IC fabricated on [[Intel 4]] process and features a unique programmable microcode learning engine for on-chip SNN training.
 
'''Loihi 2''' (pronounced low-ee-hee 2) is the successor to {{\\|Loihi}}, a second-generation neuromorphic research test chip designed by Intel Labs that was introduced in late 2021. The chip uses an asynchronous spiking neural network (SNN) to implement adaptive self-modifying event-driven fine-grained parallel computations used to implement learning and inference with high efficiency. The chip is a 128-neuromorphic cores many-core IC fabricated on [[Intel 4]] process and features a unique programmable microcode learning engine for on-chip SNN training.
 
== Overview ==
 
Introduced in September 2021, Loihi 2 is the successor to {{\\|Loihi}}, a neuromorphic research test chip. Like its predecessor, {{\\|Loihi}}, Loihi 2 consists of an asynchronous spiking neural network (SNN) meaning instead of manipulating signals, the chip sends spikes along activate synapses. Connections are asynchronous and highly timed-based. Neuromorphic cores containing many neurons are interlinked and receive spikes from elsewhere in the network. When received spikes accumulate for a certain period of time and reach a set threshold, the core will fire off its own spikes to its connected neurons. Preceding spikes reinforce each other and the neuron connections while spikes that follow will inhibit the connection, declining the connectivity until all activities are halted.
 
 
Loihi 2 is fabricated on pre-production [[Intel 4 process]] and has a total of 1,048,576 artificial neurons and 120 million synapses. In addition to the 128 neuromorphic cores, there are 6 managing Lakemont cores.
 
 
=== Key changes from {{\\|Loihi}} ===
 
* [[Intel 14 nm]] -> [[Intel 4 process]]
 
* 1.10x transistors
 
* 0.9x synapses per neuron (120,000,000, down from 130,000,000)
 
* 7.7x neurons (1,048,576, up from 131,072)
 
** 8192 neurons/0.21 mm² Core (up from 1024 neurons/0.41 mm² Core)
 
* 2x microprocessor count (6, up from 3)
 
* 3D mesh scaling (from 2D)
 
* 32-bit integer payload (from binary)
 
* Rich programmable neuron cores
 
* 3-factor learning
 
* Faster circuits
 
* new interfaces
 
** gigabit ethernet
 
 
== Architecture ==
 
{{empty section}}
 
 
== Loihi 2-based neuromorphic system ==
 
Intel developed a series of systems based on Loihi 2 which scale to a large number of Neurons and Synapses.
 
 
{| class="wikitable"
 
|-
 
! Oheo Gulch !! Kapoho Point
 
|-
 
| PCIe card || 4" x 4" Ethernet
 
|-
 
| 1 Chip || 8 Chips
 
|-
 
| 120,000,000 Synapses || 960,000,000 Synapses
 
|-
 
| 1,048,576 Neurons || 8,388,608 Neurons
 
|}
 
 
=== Oheo Gulch (1 chip, 1M neurons) ===
 
'''Oheo Gulch''' is a PCIe card form factor that incorporates a single socketed Loihi 2 chip.
 
 
[[File:intel Oheo Gulch card.jpg|800px]]
 
 
=== Kapoho Point (8 chip, 8M neurons) ===
 
'''Kapoho Point''' a 4-inch by 4-inch form factor board featuring eight Loihi 2 chips arranged in a 2-stacked (double-sided PCB) 4x4 chips. With eight Loihi 2 chips, Kapoho Point incorporates 1,024 neuromorphic cores with 960,000,000 synapses and 8.4 million neurons.
 
 
[[File:intel Kapoho Point board.jpg|600px]]
 
 
== Die ==
 
* [[Intel 4 process]]
 
* 2,300,000,000 transistors
 
**  128 neuromorphic cores + 6 x86 cores
 
* 31 mm² die size
 
** Core area 0.21 mm²
 
 
 
: [[File:intel loihi 2 die shot.png|class=wikichip_ogimage|850px]]
 
 
 
: [[File:loihi 2 die (annotated).png|850px]]
 
 
 
<gallery widths=400px heights=400px>
 
File:Intel Loihi 2 Die.jpg
 
File:Intel Loihi 2 Fingertip.jpg
 
</gallery>
 
 
== Bibliography ==
 
* ''Some information was obtained directly from Intel''
 
 
== See also ==
 
* {{intel|Loihi}}
 
* {{ibm|TrueNorth}}
 

Please note that all contributions to WikiChip may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see WikiChip:Copyrights for details). Do not submit copyrighted work without permission!

Cancel | Editing help (opens in new window)

This page is a member of 1 hidden category:

Facts about "Loihi 2 - Intel"
core voltage (max)1.25 V (12.5 dV, 125 cV, 1,250 mV) +
core voltage (min)0.5 V (5 dV, 50 cV, 500 mV) +
designerIntel +
die area31 mm² (0.0481 in², 0.31 cm², 31,000,000 µm²) +
first announcedSeptember 30, 2021 +
first launchedSeptember 30, 2021 +
full page nameintel/loihi 2 +
instance ofneuromorphic chip +
ldateSeptember 30, 2021 +
main imageFile:intel loihi 2 chip.png +
manufacturerIntel +
market segmentArtificial Intelligence +
max cpu count16,384 +
nameLoihi 2 +
neuron count1,048,576 +
smp max ways16,384 +
synapse count120,000,000 +
technologyCMOS +
transistor count2,300,000,000 +