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Editing immediate value

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== Implementation restrictions ==
 
== Implementation restrictions ==
 
[[File:MIPS32 add and addi instructions.svg|thumb|right|300px|An encoding comparision between the [[MIPS32]] ADD and ADD Immediate instructions. The immediate value is limited to the 0x00-0xFFFF range.]]
 
[[File:MIPS32 add and addi instructions.svg|thumb|right|300px|An encoding comparision between the [[MIPS32]] ADD and ADD Immediate instructions. The immediate value is limited to the 0x00-0xFFFF range.]]
Because the immediate value is packed into the instruction itself certain [[ISA]]s have a restricted range of values that can be used as an immediate value. For example in [[MIPS32]], an immediate value is limited to 16-bits. On some more complex architectures such as [[ARM]], some instructions may accept a 16-bit value, others might accepted a smaller range with a the ability to rotate the bits as desired (see {{ARM|LSL}}).
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Because the immediate value is packed into the instruction itself certain [[ISA]]s have a restricted range of values that can be used as an immediate value. For example in [[MIPS32]], an immediate value is limited to 16-bits. On some more complex architectures such as [[ARM]], some instructions may accept a 16-bit value, others might accepted a smaller range with a the ability to rotate the bits as desired (see [[LSL - ARM|LSL]]).
 
 
In situations where the immediate value cannot be encoded directly into the instruction, such as when the value is out of range, various other ways of working with such values are possible. One such option is to load common values from a constant pool in memory (e.g. a [[literal pool]]). Alternatively values can be assembled using values that can be represented or loaded into a register and operated from there. Some [[ISA]]s such as [[MIPS32]] and [[ARM]] have dedicated instructions such as {{MIPS32|LUI}}, {{ARM|MOVW}}, and {{ARM|MOVT}} which provides a way to load the upper 16-bits followed by the lower 16-bits into a single register.
 
  
 
[[Category:microprocessor architecture]]
 
[[Category:microprocessor architecture]]
 
[[Category:Instruction set architecture]]
 
[[Category:Instruction set architecture]]

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